Re: [PATCH v2] arm64: dts: qcom: sa8775p: pmic: enable rtc

[Dmitry Baryshkov]

On Thu, May 29, 2025 at 11:47:08AM +0800, Tingguo Cheng wrote:
> Add RTC node, the RTC is controlled by PMIC device via spmi bus.
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> Signed-off-by: Tingguo Cheng <tingguo.cheng@xxxxxxxxxxxxxxxx>
> ---
> Changes in v2:
> - Changed the Email address from quicinc.com to oss.qualcomm.com.
> - Removed the 'allow-set-time' property because APPS is prohibited from setting the hardware RTC time.

How do we handle the offset then? Is there an nvram cell that stores
offset between RTC value and the actual time?

> - Rebased on next-20250528.
> - Link to v1: https://lore.kernel.org/r/20240902104302.3959670-1-quic_tingguoc@xxxxxxxxxxx
> ---
>  arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
> index 1369c3d43f866de9d8cd5cd4985241b99c0a0454..9e0d05c1b39ce229d5d4310ea1df1bf02e689178 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
> @@ -132,6 +132,13 @@ pmm8654au_0_pon_resin: resin {
>  			};
>  		};
>  
> +		pmm8654au_0_rtc: rtc@6100 {
> +			compatible = "qcom,pmk8350-rtc";
> +			reg = <0x6100>, <0x6200>;
> +			reg-names = "rtc", "alarm";
> +			interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>  		pmm8654au_0_gpios: gpio@8800 {
>  			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
>  			reg = <0x8800>;
> 
> ---
> base-commit: 4788e5176e2ae85ec6d2022a5a79aae0da083154
> change-id: 20250529-add-rtc-for-sa8775p-726de6e77500
> 
> Best regards,
> -- 
> Tingguo Cheng <tingguo.cheng@xxxxxxxxxxxxxxxx>
> 

-- 
With best wishes
Dmitry