[PATCH 1/3] dt-bindings: pinctrl: add compatible for Renesas RZ/T2H

[Thierry Bultel]

Document RZ/T2H (a.k.a r9a09g077) pinctrl

Signed-off-by: Thierry Bultel <thierry.bultel.yh@xxxxxxxxxxxxxx>
---
 .../bindings/pinctrl/renesas,pfc.yaml         | 59 +++++++++++++------
 include/dt-bindings/pinctrl/rzt2h-pinctrl.h   | 23 ++++++++
 2 files changed, 65 insertions(+), 17 deletions(-)
 create mode 100644 include/dt-bindings/pinctrl/rzt2h-pinctrl.h

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
index cfe004573366..6d6f97daad17 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
@@ -29,6 +29,7 @@ properties:
       - renesas,pfc-r8a774b1    # RZ/G2N
       - renesas,pfc-r8a774c0    # RZ/G2E
       - renesas,pfc-r8a774e1    # RZ/G2H
+      - renesas,pfc-r9a09g077   # RZ/T2H
       - renesas,pfc-r8a7778     # R-Car M1
       - renesas,pfc-r8a7779     # R-Car H1
       - renesas,pfc-r8a7790     # R-Car H2
@@ -74,27 +75,41 @@ properties:
   power-domains:
     maxItems: 1
 
-allOf:
-  - $ref: pinctrl.yaml#
-
 required:
   - compatible
   - reg
 
-if:
-  properties:
-    compatible:
-      enum:
-        - renesas,pfc-r8a73a4
-        - renesas,pfc-r8a7740
-        - renesas,pfc-sh73a0
-then:
-  required:
-    - interrupts-extended
-    - gpio-controller
-    - '#gpio-cells'
-    - gpio-ranges
-    - power-domains
+allOf:
+  - $ref: pinctrl.yaml#
+  - if:
+      properties:
+        compatible:
+          enum:
+            - renesas,pfc-r8a73a4
+            - renesas,pfc-r8a7740
+            - renesas,pfc-sh73a0
+    then:
+      required:
+        - interrupts-extended
+        - gpio-controller
+        - '#gpio-cells'
+        - gpio-ranges
+        - power-domains
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: renesas,pfc-r9a09g077
+    then:
+      required:
+        - gpio-controller
+        - '#gpio-cells'
+        - gpio-ranges
+      properties:
+        reg:
+          items:
+            - description: base address of register block 0
+            - description: base address of register block 1
 
 additionalProperties:
   anyOf:
@@ -194,3 +209,13 @@ examples:
                     power-source = <3300>;
             };
     };
+
+  - |
+    pinctrl: pinctrl@812c0000 {
+            compatible = "renesas,pfc-r9a09g077";
+            reg = <0x802c0000 0x2000>,
+                  <0x812c0000 0x2000>;
+            gpio-controller;
+            #gpio-cells = <2>;
+            gpio-ranges = <&pinctrl 0 0 287>;
+    };
diff --git a/include/dt-bindings/pinctrl/rzt2h-pinctrl.h b/include/dt-bindings/pinctrl/rzt2h-pinctrl.h
new file mode 100644
index 000000000000..7842783fdb7a
--- /dev/null
+++ b/include/dt-bindings/pinctrl/rzt2h-pinctrl.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * This header provides constants for Renesas RZ/T2H family pinctrl bindings.
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ *
+ */
+
+#ifndef __DT_BINDINGS_RZT2H_PINCTRL_H
+#define __DT_BINDINGS_RZT2H_PINCTRL_H
+
+#define RZT2H_PINS_PER_PORT	8
+
+/*
+ * Create the pin index from its bank and position numbers and store in
+ * the upper 16 bits the alternate function identifier
+ */
+#define RZT2H_PORT_PINMUX(b, p, f)	((b) * RZT2H_PINS_PER_PORT + (p) | ((f) << 16))
+
+/* Convert a port and pin label to its global pin index */
+#define RZT2H_GPIO(port, pin)	((port) * RZT2H_PINS_PER_PORT + (pin))
+
+#endif /* __DT_BINDINGS_RZT2H_PINCTRL_H */
-- 
2.43.0