[PATCHv3 0/4] x86: Make 5-level paging support unconditional for x86-64
From: Kirill A. Shutemov
Date: Fri May 16 2025 - 08:34:25 EST
Both Intel and AMD CPUs support 5-level paging, which is expected to
become more widely adopted in the future.
Remove CONFIG_X86_5LEVEL.
In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
SPARSEMEM_VMEMMAP the only memory model.
v3:
- Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
- Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
to support PGTABLE_LEVELS < 5;
- Add Reviewed-by tags from Ard;
v2:
- Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
#if CONFIG_PGTABLE_LEVELS > 4;
- Rebased onto current tip/master;
Kirill A. Shutemov (4):
x86/64/mm: Always use dynamic memory layout
x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
x86/64/mm: Make 5-level paging support unconditional
x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only
Documentation/arch/x86/cpuinfo.rst | 8 ++---
.../arch/x86/x86_64/5level-paging.rst | 9 -----
arch/x86/Kconfig | 33 ++-----------------
arch/x86/Kconfig.cpufeatures | 4 ---
arch/x86/boot/compressed/pgtable_64.c | 11 ++-----
arch/x86/boot/header.S | 4 ---
arch/x86/boot/startup/map_kernel.c | 5 +--
arch/x86/entry/vsyscall/vsyscall_64.c | 2 --
arch/x86/include/asm/page_64.h | 2 --
arch/x86/include/asm/page_64_types.h | 11 -------
arch/x86/include/asm/paravirt.h | 4 ---
arch/x86/include/asm/paravirt_types.h | 2 --
arch/x86/include/asm/pgtable_64.h | 2 --
arch/x86/include/asm/pgtable_64_types.h | 24 --------------
arch/x86/kernel/alternative.c | 2 +-
arch/x86/kernel/head64.c | 4 ---
arch/x86/kernel/head_64.S | 2 --
arch/x86/kernel/paravirt.c | 2 --
arch/x86/mm/init.c | 4 ---
arch/x86/mm/init_64.c | 9 +----
arch/x86/mm/pgtable.c | 2 +-
arch/x86/xen/mmu_pv.c | 4 ---
drivers/firmware/efi/libstub/x86-5lvl.c | 2 +-
scripts/gdb/linux/pgtable.py | 4 +--
24 files changed, 14 insertions(+), 142 deletions(-)
--
2.47.2