The CSID in sa8775p is version 690, This csid is different fromThis becomes more complex if more number of chipsets under csid gen3 are added.inline function helps for readability. It should return with 1, 13 or 14. This comment is applicable at all places in csid.
csid 780 w.r.t few bit-fields.
Co-developed-by: Suresh Vankadara <quic_svankada@xxxxxxxxxxx>
Signed-off-by: Suresh Vankadara <quic_svankada@xxxxxxxxxxx>
Signed-off-by: Vikram Sharma <quic_vikramsa@xxxxxxxxxxx>
---
.../platform/qcom/camss/camss-csid-gen3.c | 31 +++-
drivers/media/platform/qcom/camss/camss.c | 151 ++++++++++++++++++
2 files changed, 175 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen3.c b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
index b66105f7b901..4f9471523a08 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-gen3.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen3.c
@@ -48,8 +48,12 @@
#define CSID_CSI2_RX_IRQ_CLEAR 0xA4
#define CSID_CSI2_RX_IRQ_SET 0xA8
+#define IS_CSID_690(csid) (csid->camss->res->version ==\
+ CAMSS_8775P ? true : false)
#define CSID_BUF_DONE_IRQ_STATUS 0x8C
-#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ? 1 : 14)
+#define BUF_DONE_IRQ_STATUS_RDI_OFFSET (csid_is_lite(csid) ?\
+ 1 : (IS_CSID_690(csid) ?\
+ 13 : 14))
-#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (0x548 + 0x100 * (rdi))Subsample pattern is not used in driver. Remove?
-#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (0x54C + 0x100 * (rdi))
-
+#define CSID_RDI_IRQ_SUBSAMPLE_PATTERN(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x348 + 0x100 * (rdi)) :\
+ (0x548 + 0x100 * (rdi)))
+#define CSID_RDI_IRQ_SUBSAMPLE_PERIOD(rdi) (csid_is_lite(csid) && IS_CSID_690(csid) ?\
+ (0x34C + 0x100 * (rdi)) :\
+ (0x54C + 0x100 * (rdi)))
#define CSI2_RX_CFG0_PHY_SEL_BASE_IDX 1Is VC greater than 3? in which case?
static void __csid_configure_rx(struct csid_device *csid,
@@ -103,6 +117,9 @@ static void __csid_configure_rx(struct csid_device *csid,
val |= phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL;
val |= (phy->csiphy_id + CSI2_RX_CFG0_PHY_SEL_BASE_IDX) << CSI2_RX_CFG0_PHY_NUM_SEL;
+ if (IS_CSID_690(csid) && (vc > 3))
+ val |= 1 << CSI2_RX_CFG0_VC_MODE;
+static const struct camss_subdev_resources csid_res_8775p[] = {Align name with DTS for csid_top. Comment is applicable for all instances for this target.
+ /* CSID0 */
+ {
+ .regulators = {},
+
+ .clock = { "csid", "csiphy_rx"},
+ .clock_rate = {
+ { 400000000, 400000000},
+ { 400000000, 400000000}
+ },
+
+ .reg = { "csid0", "csid_top" },
+ /* CSID2 (lite) */Align with DTS comment in clock name. Applicable for all CSID lites for this target.
+ {
+ .regulators = {},
+
+ .clock = { "cpas_ife_lite", "vfe_lite_ahb",
+ "vfe_lite_csid", "vfe_lite_cphy_rx",
+ "vfe_lite"},