Re: [PATCH v3 15/17] x86/mce/amd: Support SMCA Corrected Error Interrupt
From: Borislav Petkov
Date: Fri May 09 2025 - 15:37:57 EST
On Tue, Apr 15, 2025 at 02:55:10PM +0000, Yazen Ghannam wrote:
> @@ -306,6 +306,11 @@ static void smca_configure(unsigned int bank, unsigned int cpu)
> high |= BIT(5);
> }
Yeah, the above statements explain in comments what they do so that we don't
have to define the bits but use them straight "naked" with the BIT macro.
I think you'd need to put something along the lines of that text...
> Check for the feature bit in the MCA_CONFIG register and confirm that
> the MCA thresholding interrupt handler is already enabled. If successful,
> set the feature enable bit in the MCA_CONFIG register to indicate to the
> Platform that the OS is ready for the interrupt.
... here.
<---
> + if ((low & BIT(10)) && data->thr_intr_en) {
> + __set_bit(bank, data->thr_intr_banks);
> + high |= BIT(8);
> + }
> +
> this_cpu_ptr(mce_banks_array)[bank].lsb_in_status = !!(low & BIT(8));
>
> wrmsr(smca_config, low, high);
>
> --
> 2.49.0
>
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette