Re: [PATCH 1/2] arm64: dts: renesas: r9a09g057: Add GBETH nodes

[Geert Uytterhoeven]

Hi Prabhakar,

On Mon, 28 Apr 2025 at 22:55, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Renesas RZ/V2H(P) SoC is equipped with 2x Synopsys DesignWare Ethernet
> Quality-of-Service IP block version 5.20. Add GBETH nodes to R9A09G057
> RZ/V2H(P) SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -701,6 +701,200 @@ sdhi2_vqmmc: vqmmc-regulator {
>                                 status = "disabled";
>                         };
>                 };
> +
> +               eth0: ethernet@15c30000 {
> +                       compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",
> +                                    "snps,dwmac-5.20";
> +                       reg = <0 0x15c30000 0 0x10000>;
> +                       interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH>,

775?

> +                                    <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
> +                                         "rx-queue-0", "rx-queue-1", "rx-queue-2",
> +                                         "rx-queue-3", "tx-queue-0", "tx-queue-1",
> +                                         "tx-queue-2", "tx-queue-3";
> +                       clocks =  <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
> +                                 <&cpg CPG_CORE R9A09G057_GBETH_0_CLK_PTP_REF_I>,
> +                                 <&cpg CPG_MOD 0xb8>, <&cpg CPG_MOD 0xb9>,
> +                                 <&cpg CPG_MOD 0xba>, <&cpg CPG_MOD 0xbb>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "rx", "tx-180", "rx-180";
> +                       resets = <&cpg 0xb0>;

power-domains = <&cpg>;

> +                       snps,multicast-filter-bins = <256>;
> +                       snps,perfect-filter-entries = <128>;
> +                       rx-fifo-depth = <8192>;
> +                       tx-fifo-depth = <8192>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,mtl-rx-config = <&mtl_rx_setup0>;
> +                       snps,mtl-tx-config = <&mtl_tx_setup0>;
> +                       snps,txpbl = <32>;
> +                       snps,rxpbl = <32>;
> +                       status = "disabled";
> +
> +                       mtl_rx_setup0: rx-queues-config {
> +                               snps,rx-queues-to-use = <4>;
> +                               snps,rx-sched-sp;

Any specific reason the first instance has this property, while the
second has not?

> +               eth1: ethernet@15c40000 {
> +                       compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth",
> +                                    "snps,dwmac-5.20";
> +                       reg = <0 0x15c40000 0 0x10000>;
> +                       interrupts = <GIC_SPI 780 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 781 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 788 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 786 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
> +                                         "rx-queue-0", "rx-queue-1", "rx-queue-2",
> +                                         "rx-queue-3", "tx-queue-0", "tx-queue-1",
> +                                         "tx-queue-2", "tx-queue-3";
> +                       clocks =  <&cpg CPG_MOD 0xc3>, <&cpg CPG_MOD 0xc2>,
> +                                 <&cpg CPG_CORE R9A09G057_GBETH_1_CLK_PTP_REF_I>,
> +                                 <&cpg CPG_MOD 0xbe>, <&cpg CPG_MOD 0xbf>,
> +                                 <&cpg CPG_MOD 0xc0>, <&cpg CPG_MOD 0xc1>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "rx", "tx-180", "rx-180";
> +                       resets = <&cpg 0xb1>;

power-domains = <&cpg>;

> +                       snps,multicast-filter-bins = <256>;
> +                       snps,perfect-filter-entries = <128>;
> +                       rx-fifo-depth = <8192>;
> +                       tx-fifo-depth = <8192>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,mtl-rx-config = <&mtl_rx_setup1>;
> +                       snps,mtl-tx-config = <&mtl_tx_setup1>;
> +                       snps,txpbl = <32>;
> +                       snps,rxpbl = <32>;
> +                       status = "disabled";

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds