Re: [PATCH v2 0/9] Enable QUPs and Serial on SA8255p Qualcomm platforms

From: Praveen Talari
Date: Fri Apr 25 2025 - 10:21:53 EST


Hi

On 4/23/2025 6:31 PM, Konrad Dybcio wrote:
On 4/18/25 5:12 PM, Praveen Talari wrote:
The Qualcomm automotive SA8255p SoC relies on firmware to configure
platform resources, including clocks, interconnects and TLMM. The device
drivers request resources operations over SCMI using power and
performance protocols.

The SCMI power protocol enables or disables resources like clocks,
interconnect paths, and TLMM (GPIOs) using runtime PM framework APIs,
such as resume/suspend, to control power states(on/off).

The SCMI performance protocol manages UART baud rates, with each baud
rate represented by a performance level. Drivers use the
dev_pm_opp_set_level() API to request the desired baud rate by
specifying the performance level.

The QUP drivers are SCMI clients, with clocks, interconnects, pinctrl
and power-domains abstracted by a SCMI server.
So I recently started working on abstracting away power controls from
the SE protocol drivers into a single place, among other improvements

A snapshot of this work is available here

https://github.com/quic-kdybcio/linux/commits/topic/single_node_genise/

(not yet 100% ready..)

I think it'd make sense to get it done first, so that we can condense
most of your changes in the common driver, where we'd swap out the clock
handling for perf level setting instead
Thank you for the update and for sharing the snapshot of your work. The improvements you're working on sound promising, especially the abstraction of power controls into a single place.
While we appreciate the direction you're taking, our patch has already been pushed upstream with V2.
To maintain our momentum, we would prefer to continue with our current cleanups rather than waiting for your post if it's planned for a few weeks from now.

It would be greatly appreciated if you could take this patch and build your ongoing work on top of it, as it would be somewhat similar to optimize it from SE's protocol driver to the common geni driver for power management.

That being said, could you please provide an estimated completion date for your work?


Thanks,

Praveen


Konrad