Re: [PATCH 6/7] EDAC/{skx_common,i10nm}: Refactor show_retry_rd_err_log()

[Luck, Tony]

On Thu, Apr 17, 2025 at 11:07:23PM +0800, Qiuxu Zhuo wrote:
> +	/* CORRERRCNT register parts. */
> +	int cecnt_num;
> +	u32 cecnt_offsets[NUM_CECNT_REG];
> +	u8 cecnt_widths[NUM_CECNT_REG];

YOu have added this "cecnt_widths" field and code to print in different
formats fo value == 4 ("%.8llx") and not 4 ("%.16llx"). But no CPU
(including Granite Rapids added by next patch) has any values other
than "4".

Is there a mistake in the struct reg_rrl defintions where you intended
to have some "8" values somewhere?

Or is this just for symmetry with the ".widths" you have for the
RRL register (which do have varying widths).

-Tony