Re: [PATCH v8 07/16] cxl/pci: Move existing CXL RAS initialization to CXL's cxl_port driver

[Jonathan Cameron]

On Wed, 26 Mar 2025 20:47:08 -0500
Terry Bowman <terry.bowman@xxxxxxx> wrote:

> Restricted CXL Host (RCH) Downstream Port RAS initialization currently
> resides in cxl/core/pci.c. The PCI source file is not otherwise associated
> with CXL port management.
> 
> Additional CXL Port RAS initialization will be added in future patches to
> support CXL Port devices' CXL errors.
> 
> Move existing RAS initialization to the cxl_port driver. The cxl_port
> driver is intended to manage CXL Endpoint and CXL Switch Ports.
> 
> Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx>
Hi Terry,

Sorry for the interrupt nature of reviews on this. Crazy week.

Anyhow getting back to this series...

I'm not a fan of ifdefs in a c file.  Maybe we should consider
a port_aer.c and stubbing in the header as needed?

I think it ends up cleaner both in this patch and even more so later
in the series.

Jonathan

p.s. And now I need to run again.  I'll be back!