[PATCH RFC v3 0/7] clk: thead: Add support for TH1520 AP_SUBSYS clock controller

From: Drew Fustini
Date: Tue May 07 2024 - 00:57:57 EST


This series adds support for the AP sub-system clock controller in the
T-Head TH1520 [1]. Yangtao Li originally submitted this series in May
2023 [2]. Jisheng made additional improvements and then passed on the
work in progress to me.

Changes in RFC v3:
- Drop redundant new line and unused clk label from the dts example in
the DT binding which I failed to fix in v2.
- Add patch [3] from Thomas Bonnefille that fixes dts node ordering in
th1520.dtsi. Conor has already merged it into riscv-dt-for-next so
the dts patches in this series are based on top of that.
- Remove fixed uart clock and converted uart DT nodes to use clocks
from the clock controller.
- Remove fixed apb clock and converted the dma controller and timer DT
nodes to use a clock from the clock controller.
- Made ccu_disable_helper() and ccu_enable_helper() to static functions
- Follow the advice from Stephen Boyd in Yangtao's original series to
not use strings for clk tree topology. Created clk_parent_data arrays
to be used with CLK_HW_INIT_PARENTS_DATA instead of parent strings.
- Rebase on top of v6.9-rc7

Changes in RFC v2 [4]:
- squash the header file patch into the DT schema patch
- describe the changes I made to original series in the cover letter
instead of the individual patches
- fix my typo in my email address

Changes in RFC v1 [5] from the original series:
- corrected the npu_clk enable bit
- deduplicated CLK_NPU and CLK_NPU_AXI number in header
- fixed c910_i0_clk reg typo
- fixed checkpatch and dt_binding_check warnings
- rebased on v6.9-rc5
- revised commit descriptions

TODO:
This is still marked as an RFC because I still need to make the
improvements that Emil suggested in v1:
- Input predivider is not handled correctly in ccu_mdiv_recalc_rate().
The PLL multiplies the input frequency and outputs "Foutvco". This is
followed by a post divider to produce "Foutpostdiv". However, some
clocks derive directly from the "Foutvco". These should be modelled
as two differnt clocks.
- Use devm_clk_hw_register_gate() for the gates
- Use devm_clk_hw_register_mux() for the muxes

I'll post a v1 patch once I've addressed the above issues.

Thank you,
Drew

[1] https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
[2] https://lore.kernel.org/all/20230515054402.27633-1-frank.li@xxxxxxxx/
[3] https://lore.kernel.org/all/20240425082138.374445-1-thomas.bonnefille@xxxxxxxxxxx/
[4] https://lore.kernel.org/all/20240426-th1520-clk-v2-v2-0-96b829e6fcee@xxxxxxxxxxxxxxx/
[5] https://lore.kernel.org/all/20240110-clk-th1520-v1-0-8b0682567984@xxxxxxxxxxxxxxx/

To: Jisheng Zhang <jszhang@xxxxxxxxxx>
To: Guo Ren <guoren@xxxxxxxxxx>
To: Fu Wei <wefu@xxxxxxxxxx>
To: Yangtao Li <frank.li@xxxxxxxx>
To: Thomas Bonnefille <thomas.bonnefille@xxxxxxxxxxx>
To: Emil Renner Berthing <emil.renner.berthing@xxxxxxxxxxxxx>
To: Michael Turquette <mturquette@xxxxxxxxxxxx>
To: Stephen Boyd <sboyd@xxxxxxxxxx>
To: Rob Herring <robh@xxxxxxxxxx>
To: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>
To: Conor Dooley <conor+dt@xxxxxxxxxx>
To: Paul Walmsley <paul.walmsley@xxxxxxxxxx>
To: Palmer Dabbelt <palmer@xxxxxxxxxxx>
To: Albert Ou <aou@xxxxxxxxxxxxxxxxx>
Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx
Cc: linux-clk@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx

Signed-off-by: Drew Fustini <dfustini@xxxxxxxxxxxxxxx>
---
Drew Fustini (6):
dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
riscv: dts: thead: change TH1520 uart nodes to use clock controller
riscv: dts: thead: change TH1520 mmc nodes to use clock controller
riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller

Thomas Bonnefille (1):
riscv: dts: thead: Fix node ordering in TH1520 device tree

.../bindings/clock/thead,th1520-clk-ap.yaml | 64 ++
MAINTAINERS | 3 +
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 12 -
.../boot/dts/thead/th1520-lichee-module-4a.dtsi | 12 -
arch/riscv/boot/dts/thead/th1520.dtsi | 118 ++-
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/thead/Kconfig | 12 +
drivers/clk/thead/Makefile | 2 +
drivers/clk/thead/clk-th1520-ap.c | 1074 ++++++++++++++++++++
include/dt-bindings/clock/thead,th1520-clk-ap.h | 96 ++
11 files changed, 1310 insertions(+), 85 deletions(-)
---
base-commit: dd5a440a31fae6e459c0d6271dddd62825505361
change-id: 20240505-th1520-clk-b8f8fb2ecf28

Best regards,
--
Drew Fustini <dfustini@xxxxxxxxxxxxxxx>