Re: [tip:x86/alternatives] [x86/alternatives] ee8962082a: WARNING:at_arch/x86/kernel/cpu/cpuid-deps.c:#do_clear_cpu_cap

From: Borislav Petkov
Date: Mon May 06 2024 - 11:58:25 EST


On Mon, May 06, 2024 at 08:28:46AM -0700, Sean Christopherson wrote:
> The only way the WARN could have fired without this series is if VMX is enabled
> in BIOS on the boot CPU, but disabled by BIOS on one more secondary CPUs. And
> _that_ is a bogus setup that (a) the kernel absolutely should WARN about, and
> (b) _still_ occurs with one or both patches applied.

Right, that's my suspicion too.

> So I don't see how this series could possibly have fixed the issue Oliver
> encountered, nor do I see any value in moving init_ia32_feat_ctl() into
> early_init_intel().

Hm, right. I should've done this from the very beginning:

Oliver, can you please run the below debugging patch *without* any other
patches ontop of latest Linus master?

Also pls send /proc/cpuinfo and dmesg.

Thx.

---
diff --git a/arch/x86/kernel/cpu/feat_ctl.c b/arch/x86/kernel/cpu/feat_ctl.c
index 1640ae76548f..74d2f0a351aa 100644
--- a/arch/x86/kernel/cpu/feat_ctl.c
+++ b/arch/x86/kernel/cpu/feat_ctl.c
@@ -117,8 +117,14 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
bool tboot = tboot_enabled();
bool enable_vmx;
u64 msr;
+ int ret;

- if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr)) {
+ ret = rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr);
+
+ pr_info("%s: CPU%d: FEAT_CTL: 0x%llx, tboot: %d\n",
+ __func__, c->cpu_index, msr, tboot);
+
+ if (ret) {
clear_cpu_cap(c, X86_FEATURE_VMX);
clear_cpu_cap(c, X86_FEATURE_SGX);
return;
@@ -165,6 +171,9 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
msr |= FEAT_CTL_SGX_LC_ENABLED;
}

+ pr_info("%s: CPU%d: Write FEAT_CTL: 0x%llx\n",
+ __func__, c->cpu_index, msr);
+
wrmsrl(MSR_IA32_FEAT_CTL, msr);

update_caps:

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette