[PATCH 1/3] tso: aarch64: allow linux kernel to read/write ACTLR.TSOEN

[Zayd Qumsieh]

Create a couple simplistic functions that can read / modify the
ACTLR.TSOEN bit on Apple Silicon. Setting this bit to 1 will change
the CPU's memory model to x86-64's TSO memory model. Clearing it will
set the CPU's memory model to the standard ARM64 memory model.

Signed-off-by: Zayd Qumsieh <zayd_qumsieh@xxxxxxxxx>
---
 arch/arm64/Kconfig              | 13 +++++++++
 arch/arm64/include/asm/sysreg.h |  7 +++++
 arch/arm64/include/asm/tso.h    | 17 +++++++++++
 arch/arm64/kernel/Makefile      |  2 +-
 arch/arm64/kernel/tso.c         | 52 +++++++++++++++++++++++++++++++++
 5 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/include/asm/tso.h
 create mode 100644 arch/arm64/kernel/tso.c

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7b11c98b3e84..35162e5a0705 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
+# Copyright © 2024 Apple Inc. All rights reserved.
 config ARM64
 	def_bool y
 	select ACPI_APMT if ACPI
@@ -2079,6 +2080,18 @@ config ARM64_MTE
 
 	  Documentation/arch/arm64/memory-tagging-extension.rst.
 
+config ARM64_TSO
+	bool "ARM64 Apple Silicon TSO support"
+	default y
+	help
+	  Apple Silicon TSO mode allows the CPU's memory model to be
+	  dynamically switched between the default ARM64 memory model
+	  and x86_64's memory model (TSO).
+
+	  Selecting this option allows the feature to be detected at
+	  runtime. If the CPU doesn't implement TSO mode, then this
+	  feature will be disabled.
+
 endmenu # "ARMv8.5 architectural features"
 
 menu "ARMv8.7 architectural features"
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9e8999592f3a..5464217c6bfd 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -4,6 +4,8 @@
  *
  * Copyright (C) 2014 ARM Ltd.
  * Author: Catalin Marinas <catalin.marinas@xxxxxxx>
+ *
+ * Copyright © 2024 Apple Inc. All rights reserved.
  */
 
 #ifndef __ASM_SYSREG_H
@@ -277,6 +279,9 @@
 #define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)
 
 #define SYS_ACTLR_EL1			sys_reg(3, 0, 1, 0, 1)
+#define SYS_ACTLR_EL1_TSOEN_SHIFT       1
+#define SYS_ACTLR_EL1_TSOEN_MASK        (1 << SYS_ACTLR_EL1_TSOEN_SHIFT)
+
 #define SYS_RGSR_EL1			sys_reg(3, 0, 1, 0, 5)
 #define SYS_GCR_EL1			sys_reg(3, 0, 1, 0, 6)
 
@@ -394,6 +399,8 @@
 #define SYS_CNTKCTL_EL1			sys_reg(3, 0, 14, 1, 0)
 
 #define SYS_AIDR_EL1			sys_reg(3, 1, 0, 0, 7)
+#define SYS_AIDR_EL1_TSO_SHIFT          9
+#define SYS_AIDR_EL1_TSO_MASK           (1 << SYS_AIDR_EL1_TSO_SHIFT)
 
 #define SYS_RNDR_EL0			sys_reg(3, 3, 2, 4, 0)
 #define SYS_RNDRRS_EL0			sys_reg(3, 3, 2, 4, 1)
diff --git a/arch/arm64/include/asm/tso.h b/arch/arm64/include/asm/tso.h
new file mode 100644
index 000000000000..d9e1a7602c44
--- /dev/null
+++ b/arch/arm64/include/asm/tso.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright © 2024 Apple Inc. All rights reserved.
+ */
+
+#ifndef __ASM_TSO_H
+#define __ASM_TSO_H
+
+#ifdef CONFIG_ARM64_TSO
+
+#include <linux/sched.h>
+#include <linux/types.h>
+
+int modify_tso_enable(bool tso_enable);
+
+#endif /* CONFIG_ARM64_TSO */
+#endif /* __ASM_TSO_H */
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 763824963ed1..a2a7c74fb00d 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -33,7 +33,7 @@ obj-y			:= debug-monitors.o entry.o irq.o fpsimd.o		\
 			   return_address.o cpuinfo.o cpu_errata.o		\
 			   cpufeature.o alternative.o cacheinfo.o		\
 			   smp.o smp_spin_table.o topology.o smccc-call.o	\
-			   syscall.o proton-pack.o idle.o patching.o pi/
+			   syscall.o proton-pack.o idle.o patching.o tso.o pi/ \
 
 obj-$(CONFIG_COMPAT)			+= sys32.o signal32.o			\
 					   sys_compat.o
diff --git a/arch/arm64/kernel/tso.c b/arch/arm64/kernel/tso.c
new file mode 100644
index 000000000000..b3964db7aa66
--- /dev/null
+++ b/arch/arm64/kernel/tso.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright © 2024 Apple Inc. All rights reserved.
+ */
+
+#include <linux/types.h>
+
+#include <asm/cputype.h>
+#include <asm/processor.h>
+#include <asm/sysreg.h>
+#include <asm/tso.h>
+
+#ifdef CONFIG_ARM64_TSO
+
+static bool tso_supported(void)
+{
+	unsigned int cpuid_implementor = read_cpuid_implementor();
+	u64 aidr = read_sysreg(aidr_el1);
+
+	return (cpuid_implementor == ARM_CPU_IMP_APPLE) &&
+		(aidr & SYS_AIDR_EL1_TSO_MASK);
+}
+
+static int tso_enabled(void)
+{
+	if (!tso_supported())
+		return -EOPNOTSUPP;
+
+	u64 actlr_el1 = read_sysreg(actlr_el1);
+
+	return !!(actlr_el1 & SYS_ACTLR_EL1_TSOEN_MASK);
+}
+
+int modify_tso_enable(bool tso_enable)
+{
+	if (!tso_supported())
+		return -EOPNOTSUPP;
+
+	u64 actlr_el1_old = read_sysreg(actlr_el1);
+	u64 actlr_el1_new =
+		(actlr_el1_old & ~SYS_ACTLR_EL1_TSOEN_MASK) |
+		(tso_enable << SYS_ACTLR_EL1_TSOEN_SHIFT);
+
+	write_sysreg(actlr_el1_new, actlr_el1);
+
+	if (tso_enabled() != tso_enable)
+		return -EOPNOTSUPP;
+
+	return 0;
+}
+
+#endif /* CONFIG_ARM64_TSO */
-- 
2.39.3 (Apple Git-146)