Re: [PATCH v5 1/4] RISC-V: add Zbc extension detection

[Jeff Law]

On 6/20/23 13:09, Palmer Dabbelt wrote:
> On Mon, 12 Jun 2023 14:31:14 PDT (-0700), Conor Dooley wrote:
> > Hey Heiko,
> >
> > On Mon, Jun 12, 2023 at 11:04:39PM +0200, Heiko Stuebner wrote:
> > > From: Heiko Stuebner <heiko.stuebner@xxxxxxxx>
> > >
> > > Add handling for Zbc extension.
> > >
> > > Zbc provides instruction for carry-less multiplication.
> > >
> > > Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxxxx>
> > > ---
> > >  arch/riscv/Kconfig             | 22 ++++++++++++++++++++++
> > >  arch/riscv/include/asm/hwcap.h |  1 +
> > >  arch/riscv/kernel/cpu.c        |  1 +
> > >  arch/riscv/kernel/cpufeature.c |  1 +
> > >  4 files changed, 25 insertions(+)
> >
> > Plumbing into the hwprobe stuff would be nice, but that's not a
> > requirement for getting stuff merged :)
>
> IIRC we talked about this on IRC, but IMO we shouldn't require something 
> be user visible for it to be merged in the kernel.
Note that exposing Zbc is potentially useful.  We've got GCC and LLVM 
code that can detect and rewrite a bitwise CRC into clmul.

Jeff