Re: [PATCH V2 14/14] arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation

From: Anshuman Khandual
Date: Tue Jun 13 2023 - 00:31:00 EST




On 6/2/23 17:42, Mark Brown wrote:
> On Fri, Jun 02, 2023 at 11:55:52AM +0530, Anshuman Khandual wrote:
>> This converts TRBIDR_EL1 register to automatic generation without
>> causing any functional change.
>
>> +Sysreg TRBIDR_EL1 3 0 9 11 7
>> +Res0 63:12
>> +Field 11:8 EA
>
> EA is another field which looks like it should be an enum, as with the
> others this shouldn't be a blocker and could be done incrementally.

Will fold the following changes in this patch.

--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2267,7 +2267,11 @@ EndSysreg

Sysreg TRBIDR_EL1 3 0 9 11 7
Res0 63:12
-Field 11:8 EA
+Enum 11:8 EA
+ 0b0000 NON_DESC
+ 0b0001 IGNORE
+ 0b0010 SERROR
+EndEnum
Res0 7:6
Field 5 F
Field 4 P


>
>> +Res0 7:6
>> +Field 5 F
>> +Field 4 P
>> +Field 3:0 Align
>
> Align arguably too though really it's just encoding the relevant power
> of 2 with the enum coming from the fact that it's limited to at most 2KB
> alignment so a Field may well make more sense.

Can fold the following changes in this patch (if required) unless the Field
looks better than Enum.

--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2275,5 +2275,18 @@ EndEnum
Res0 7:6
Field 5 F
Field 4 P
-Field 3:0 Align
+Enum 3:0 Align
+ 0b0000 BYTE
+ 0b0001 HALF_WORD
+ 0b0010 WORD
+ 0b0011 DOUBLE_WORD
+ 0b0100 16_BYTES
+ 0b0101 32_BYTES
+ 0b0110 64_BYTES
+ 0b0111 128_BYTES
+ 0b1000 156_BYTES
+ 0b1001 512_BYTES
+ 0b1010 1_KB
+ 0b1011 2_KB
+EndEnum
EndSysreg

>
> Reviewed-by: Mark Brown <broonie@xxxxxxxxxx>