[PATCH v2 0/5] cxl/pci: Add support for RCH RAS error handling

From: Terry Bowman
Date: Thu Mar 23 2023 - 17:38:24 EST


This patchset adds error handling support for restricted CXL host (RCH)
downstream ports. This is necessary because RCH downstream ports are
implemented in RCRBs and report protocol errors through a root complex
event collector (RCEC). The RCH error reporting flow is not currently
supported by the CXL driver and will be added by this patchset.

This patchset uses an updated subject line and is a continuation of:
https://lore.kernel.org/all/20221021185615.605233-1-terry.bowman@xxxxxxx/

The first patch discovers the RCH dport AER and RAS registers. These will
be mapped later and used in CXL driver error logging.

The second patch exports cper_mem_err_unpack(). cper_mem_err_unpack() is a
dependency for using the cper_print_aer() AER trace logging.

The third patch exports cper_print_aer(). cper_print_aer() is used for
CXL AER error logging because it provides a common format for logging
into dmesg.

The fourth patch is AER port driver changes for forwarding RCH errors to
the RCiEP RCH handler.

The fifth patch maps the AER and RAS registers. This patch also adds the
RCH handler for logging downstream port AER and RAS information.

This is based on cxl/next commit
e686c32590f4 ("dax/kmem: Fix leak of memory-hotplug resources")'

Robert Richter (1):
cxl/pci: Forward RCH downstream port-detected errors to the CXL.mem
dev handler

Terry Bowman (4):
cxl/pci: Add RCH downstream port AER and RAS register discovery
efi/cper: Export cper_mem_err_unpack() for CXL logging
pci/aer: Export cper_print_aer() for CXL driver logging
cxl/pci: Add RCH downstream port error logging

drivers/cxl/core/pci.c | 126 +++++++++++++++++++++++---
drivers/cxl/core/regs.c | 94 +++++++++++++++++---
drivers/cxl/cxl.h | 18 ++++
drivers/cxl/mem.c | 173 +++++++++++++++++++++++++++++++++---
drivers/firmware/efi/cper.c | 1 +
drivers/pci/pcie/aer.c | 46 ++++++++++
6 files changed, 423 insertions(+), 35 deletions(-)

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2.34.1