[PATCH v4 0/9] Add Array BIST test support to IFS

[Jithu Joseph]

Changes in v4
 - Hans de Goede
     - Separate patch 1/9 (Separate ifs_pkg_auth) from reorganize
        driver data patch
     - Rework patch 2/9 (Reorganize driver data) to define const
       ifs_test_caps struct and associate its pointer to miscdevice
       and to remove dynamic allocation for ifs_data as was done in v3
     - Move load check from run_test_store to do_core_test()
     - Expand ABI doc to qualify which devices support which attribrutes
       and the device instance to test mapping

V3 submission:
Link: https://lore.kernel.org/lkml/20230301015942.462799-1-jithu.joseph@xxxxxxxxx/

Changes in v3
 - GregKH 
    -  Separating read-only fields from rw fields in
       struct ifs_device (patch 1/8)
    -  Remove the subdirectory intel_ifs/<n> for devicenode (patch 2/8)
    -  Replaced an enum with #define (patch 4/8)
 - Dave Hansen
    - Remove tracing patch
    - ifs_array_test_core() (patch 6/8)
        - fix an initialization bug
        - other suggested changes
    - Use basic types in ifs_array for first two fields. (kept
      the union to avoid type castings)

v2 submission:
Link: https://lore.kernel.org/lkml/20230214234426.344960-1-jithu.joseph@xxxxxxxxx/

Changes in v2
 - remove duplicate initializations from ifs_array_test_core()
   (Dave Hansen, patch 4/7)
 - remove bit parsing from tracing fast path to tracing 
   output (Steven Rostedt, patch 5/7)
 - move "ATTRIBUTE_GROUPS(plat_ifs_array)" to core.c and remove
   exporting function ifs_get_array_groups() (Greg KH, patch 3/7)
 - Generalized doc and ABI doc (Greg KH, patches 6/7 and 7/7)

v1 submission:
Link: https://lore.kernel.org/lkml/20230131234302.3997223-1-jithu.joseph@xxxxxxxxx/

Array BIST is a new type of core test introduced under the Intel Infield
Scan (IFS) suite of tests.

Emerald Rapids (EMR) is the first CPU to support Array BIST.
Array BIST performs tests on some portions of the core logic such as
caches and register files. These are different portions of the silicon
compared to the parts tested by Scan at Field (SAF).

Unlike SAF, Array BIST doesn't require any test content to be loaded.

Jithu Joseph (9):
  platform/x86/intel/ifs: Separate ifs_pkg_auth from ifs_data
  platform/x86/intel/ifs: Reorganize driver data
  platform/x86/intel/ifs: IFS cleanup
  x86/include/asm/msr-index.h: Add IFS Array test bits
  platform/x86/intel/ifs: Introduce Array Scan test to IFS
  platform/x86/intel/ifs: Sysfs interface for Array BIST
  platform/x86/intel/ifs: Implement Array BIST test
  platform/x86/intel/ifs: Update IFS doc
  Documentation/ABI: Update IFS ABI doc

 arch/x86/include/asm/msr-index.h              |  2 +
 drivers/platform/x86/intel/ifs/ifs.h          | 68 ++++++++++----
 drivers/platform/x86/intel/ifs/core.c         | 81 +++++++++++-----
 drivers/platform/x86/intel/ifs/load.c         |  9 +-
 drivers/platform/x86/intel/ifs/runtest.c      | 94 ++++++++++++++++++-
 drivers/platform/x86/intel/ifs/sysfs.c        | 21 ++---
 .../ABI/testing/sysfs-platform-intel-ifs      | 17 +++-
 7 files changed, 229 insertions(+), 63 deletions(-)


base-commit: e8d018dd0257f744ca50a729e3d042cf2ec9da65
-- 
2.25.1