Re: [EXTERNAL] Re: [PATCH v11 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI

[Ravi Gunasekaran]

On 24/02/23 4:39 pm, Krzysztof Kozlowski wrote:
> On 24/02/2023 11:24, Ravi Gunasekaran wrote:
>> From: Aswath Govindraju <a-govindraju@xxxxxx>
>>
>> Add support for two instance of OSPI in J721S2 SoC.
>>
>> Reviewed-by: Vaishnav Achath <vaishnav.a@xxxxxx>
>> Signed-off-by: Aswath Govindraju <a-govindraju@xxxxxx>
>> Signed-off-by: Matt Ranostay <mranostay@xxxxxx>
>> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@xxxxxx>
>> ---
>> Changes from v10:
>> * Documented the reason for disabling the nodes by default.
>> * Removed Link tag from commmit message
>>

[...]

>>
>>  .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi     | 62 +++++++++++++++++++
>>  1 file changed, 62 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> index 0af242aa9816..5005a3ebbd34 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> @@ -306,4 +306,66 @@
>>  			ti,cpts-periodic-outputs = <2>;
>>  		};
>>  	};
>> +
>> +	fss: bus@47000000 {
>> +		compatible = "simple-bus";
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
>> +			 <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>,
>> +			 <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>;
>> +
>> +		/*
>> +		 * Disable the node by default in the common include file.
>> +		 * And enable it in the board specific DT file where the
>> +		 * pinmux property is added.
> 
> Why? Bus does not need pinmux.

Right. The comment is invalid for the bus node. Will remove it in the next
series.

> 
>> +		 */
>> +		status = "disabled";
>> +
>> +		ospi0: spi@47040000 {
>> +			compatible = "ti,am654-ospi", "cdns,qspi-nor";
>> +			reg = <0x00 0x47040000 0x00 0x100>,
>> +			      <0x05 0x00000000 0x01 0x00000000>;
>> +			interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
>> +			cdns,fifo-depth = <256>;
>> +			cdns,fifo-width = <4>;
>> +			cdns,trigger-address = <0x0>;
>> +			clocks = <&k3_clks 109 5>;
>> +			assigned-clocks = <&k3_clks 109 5>;
>> +			assigned-clock-parents = <&k3_clks 109 7>;
>> +			assigned-clock-rates = <166666666>;
>> +			power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			/*
>> +			 * Disable the node by default in the common include
>> +			 * file. And enable it in the board specific DT file
>> +			 * where the pinmux property is added.
> 
> Isn't this comment obvious? It's what we do everywhere on every platform
> every SoC?
> 

Noted. Will remove the elaborate comment.

>> +			 */
>> +			status = "disabled";
>> +		};
>> +
>> +		ospi1: spi@47050000 {
>> +			compatible = "ti,am654-ospi", "cdns,qspi-nor";
>> +			reg = <0x00 0x47050000 0x00 0x100>,
>> +			      <0x07 0x00000000 0x01 0x00000000>;
>> +			interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
>> +			cdns,fifo-depth = <256>;
>> +			cdns,fifo-width = <4>;
>> +			cdns,trigger-address = <0x0>;
>> +			clocks = <&k3_clks 110 5>;
>> +			power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			/*
>> +			 * Disable the node by default in the common include
>> +			 * file. And enable it in the board specific DT file
>> +			 * where the pinmux property is added.
>> +			 */
>> +			status = "disabled";
>> +		};
>> +
> 
> No need for blank line.

Will remove the blank line.

> 
>> +	};
>>  };
> 
> Best regards,
> Krzysztof
> 

-- 
Regards,
Ravi