Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration
From: Roger Quadros
Date: Mon Feb 20 2023 - 11:20:41 EST
On 20/02/2023 16:12, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@xxxxxxxxxxx>
Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx>