Re: [PATCH v4 11/12] net: ethernet: mtk_eth_soc: switch to external PCS driver

From: Russell King (Oracle)
Date: Sat Feb 11 2023 - 07:56:56 EST


On Fri, Feb 10, 2023 at 11:40:22PM +0000, Daniel Golle wrote:
> + eth->sgmii->dev = eth->dev;
> err = mtk_sgmii_init(eth->sgmii, pdev->dev.of_node,
> eth->soc->ana_rgc3);

>From what I can tell, it looks like sgmii->dev is only used within
mtk_sgmii_init() and nowhere else, so does it make sense to store
this in the structure rather than passing it as another argument to
this function? Seems a little wasteful for something that is only
used there.

> diff --git a/drivers/net/pcs/pcs-mtk-lynxi.c b/drivers/net/pcs/pcs-mtk-lynxi.c
> index 67965a6b57a4..f10621fc5baa 100644
> --- a/drivers/net/pcs/pcs-mtk-lynxi.c
> +++ b/drivers/net/pcs/pcs-mtk-lynxi.c
> @@ -146,6 +146,10 @@ static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int mode,
> bmcr = 0;
>
> if (mpcs->interface != interface) {
> + link_timer = phylink_get_link_timer_ns(interface);
> + if (link_timer < 0)
> + return link_timer;
> +
> /* PHYA power down */
> regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
> SGMII_PHYA_PWD, SGMII_PHYA_PWD);
> @@ -168,11 +172,7 @@ static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int mode,
> regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
> RG_PHY_SPEED_MASK, rgc3);
>
> - /* Setup the link timer and QPHY power up inside SGMIISYS */
> - link_timer = phylink_get_link_timer_ns(interface);
> - if (link_timer < 0)
> - return link_timer;
> -
> + /* Setup the link timer */
> regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER, link_timer / 2 / 8);
>
> mpcs->interface = interface;

I'm guessing you meant to squash that into patch 10 rather than this
patch?

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