Re: [PATCH v5 1/2] dt-bindings: net: Add ICSSG Ethernet

From: Rob Herring
Date: Fri Feb 10 2023 - 14:20:09 EST

On Fri, Feb 10, 2023 at 05:19:56PM +0530, MD Danish Anwar wrote:
> From: Puranjay Mohan <p-mohan@xxxxxx>
>
> Add a YAML binding document for the ICSSG Programmable real time unit
> based Ethernet hardware. The ICSSG driver uses the PRU and PRUSS consumer
> APIs to interface the PRUs and load/run the firmware for supporting
> ethernet functionality.
>
> Signed-off-by: Puranjay Mohan <p-mohan@xxxxxx>
> Signed-off-by: Md Danish Anwar <danishanwar@xxxxxx>
> ---
> .../bindings/net/ti,icssg-prueth.yaml | 184 ++++++++++++++++++
> 1 file changed, 184 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml
> new file mode 100644
> index 000000000000..8b860f29ecc0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml
> @@ -0,0 +1,184 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments ICSSG PRUSS Ethernet
> +
> +maintainers:
> + - Md Danish Anwar <danishanwar@xxxxxx>
> +
> +description:
> + Ethernet based on the Programmable Real-Time
> + Unit and Industrial Communication Subsystem.

Odd line wrap length. It should be 80 chars.

> +
> +allOf:
> + - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - ti,am654-icssg-prueth # for AM65x SoC family
> +
> + ti,sram:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + phandle to MSMC SRAM node

I believe we have a standard 'sram' property to point to SRAM nodes
assuming this is just mmio-sram or similar.

> +
> + dmas:
> + maxItems: 10
> +
> + dma-names:
> + items:
> + - const: tx0-0
> + - const: tx0-1
> + - const: tx0-2
> + - const: tx0-3
> + - const: tx1-0
> + - const: tx1-1
> + - const: tx1-2
> + - const: tx1-3
> + - const: rx0
> + - const: rx1
> +
> + ti,mii-g-rt:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + phandle to MII_G_RT module's syscon regmap.
> +
> + ti,mii-rt:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + phandle to MII_RT module's syscon regmap
> +
> + interrupts:
> + maxItems: 2
> + description: |

Don't need '|'

> + Interrupt specifiers to TX timestamp IRQ.
> +
> + interrupt-names:
> + items:
> + - const: tx_ts0
> + - const: tx_ts1
> +
> + ethernet-ports:
> + type: object
> + additionalProperties: false
> +
> + properties:
> + '#address-cells':
> + const: 1
> + '#size-cells':
> + const: 0
> +
> + patternProperties:
> + ^port@[0-1]$:
> + type: object
> + description: ICSSG PRUETH external ports
> + $ref: ethernet-controller.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + reg:
> + items:
> + - enum: [0, 1]
> + description: ICSSG PRUETH port number
> +
> + interrupts:
> + maxItems: 1
> +
> + ti,syscon-rgmii-delay:
> + items:
> + - items:
> + - description: phandle to system controller node
> + - description: The offset to ICSSG control register
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + phandle to system controller node and register offset
> + to ICSSG control register for RGMII transmit delay
> +
> + required:
> + - reg
> + anyOf:
> + - required:
> + - port@0
> + - required:
> + - port@1
> +
> +required:
> + - compatible
> + - ti,sram
> + - dmas
> + - dma-names
> + - ethernet-ports
> + - ti,mii-g-rt
> + - interrupts
> + - interrupt-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* Example k3-am654 base board SR2.0, dual-emac */
> + pruss2_eth: ethernet {
> + compatible = "ti,am654-icssg-prueth";
> + pinctrl-names = "default";
> + pinctrl-0 = <&icssg2_rgmii_pins_default>;
> + ti,sram = <&msmc_ram>;
> +
> + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
> + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
> + firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf",
> + "ti-pruss/am65x-rtu0-prueth-fw.elf",
> + "ti-pruss/am65x-txpru0-prueth-fw.elf",
> + "ti-pruss/am65x-pru1-prueth-fw.elf",
> + "ti-pruss/am65x-rtu1-prueth-fw.elf",
> + "ti-pruss/am65x-txpru1-prueth-fw.elf";
> + ti,pruss-gp-mux-sel = <2>, /* MII mode */
> + <2>,
> + <2>,
> + <2>, /* MII mode */
> + <2>,
> + <2>;
> + dmas = <&main_udmap 0xc300>, /* egress slice 0 */
> + <&main_udmap 0xc301>, /* egress slice 0 */
> + <&main_udmap 0xc302>, /* egress slice 0 */
> + <&main_udmap 0xc303>, /* egress slice 0 */
> + <&main_udmap 0xc304>, /* egress slice 1 */
> + <&main_udmap 0xc305>, /* egress slice 1 */
> + <&main_udmap 0xc306>, /* egress slice 1 */
> + <&main_udmap 0xc307>, /* egress slice 1 */
> + <&main_udmap 0x4300>, /* ingress slice 0 */
> + <&main_udmap 0x4301>; /* ingress slice 1 */
> + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
> + "tx1-0", "tx1-1", "tx1-2", "tx1-3",
> + "rx0", "rx1";
> + ti,mii-g-rt = <&icssg2_mii_g_rt>;
> + interrupt-parent = <&icssg2_intc>;
> + interrupts = <24 0 2>, <25 1 3>;
> + interrupt-names = "tx_ts0", "tx_ts1";
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pruss2_emac0: port@0 {
> + reg = <0>;
> + phy-handle = <&pruss2_eth0_phy>;
> + phy-mode = "rgmii-id";
> + interrupts-extended = <&icssg2_intc 24>;
> + ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> +
> + pruss2_emac1: port@1 {
> + reg = <1>;
> + phy-handle = <&pruss2_eth1_phy>;
> + phy-mode = "rgmii-id";
> + interrupts-extended = <&icssg2_intc 25>;
> + ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
> + /* Filled in by bootloader */
> + local-mac-address = [00 00 00 00 00 00];
> + };
> + };
> + };
> --
> 2.25.1
>