[PATCH 1/3] coresight: Update timeout functions to allow return of test register value

From: Mike Leach
Date: Fri Feb 10 2023 - 10:10:28 EST


Current coresight_timeout function spins on a bit on a test register,
till bit value achieved or timeout hit.

Add another function to return the full value of the register being
tested.

Signed-off-by: Mike Leach <mike.leach@xxxxxxxxxx>
---
drivers/hwtracing/coresight/coresight-core.c | 50 +++++++++++++++-----
include/linux/coresight.h | 10 +++-
2 files changed, 48 insertions(+), 12 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index d3bf82c0de1d..c4db111ab32b 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -1456,32 +1456,37 @@ static void coresight_remove_conns(struct coresight_device *csdev)
}

/**
- * coresight_timeout - loop until a bit has changed to a specific register
- * state.
+ * coresight_timeout_retval - loop until a bit has changed to a specific register
+ * state. Return final register value
* @csa: coresight device access for the device
* @offset: Offset of the register from the base of the device.
* @position: the position of the bit of interest.
* @value: the value the bit should have.
+ * @rval: the last read value of the register being tested.
*
* Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
* TIMEOUT_US has elapsed, which ever happens first.
*/
-int coresight_timeout(struct csdev_access *csa, u32 offset,
- int position, int value)
+int coresight_timeout_retval(struct csdev_access *csa, u32 offset,
+ int position, int value, u32 *rval)
{
- int i;
- u32 val;
+ int i, rc = -EAGAIN;
+ u32 val = 0;

for (i = TIMEOUT_US; i > 0; i--) {
val = csdev_access_read32(csa, offset);
/* waiting on the bit to go from 0 to 1 */
if (value) {
- if (val & BIT(position))
- return 0;
+ if (val & BIT(position)) {
+ rc = 0;
+ goto return_rval;
+ }
/* waiting on the bit to go from 1 to 0 */
} else {
- if (!(val & BIT(position)))
- return 0;
+ if (!(val & BIT(position))) {
+ rc = 0;
+ goto return_rval;
+ }
}

/*
@@ -1493,7 +1498,30 @@ int coresight_timeout(struct csdev_access *csa, u32 offset,
udelay(1);
}

- return -EAGAIN;
+return_rval:
+ *rval = val;
+
+ return rc;
+}
+EXPORT_SYMBOL_GPL(coresight_timeout_retval);
+
+/**
+ * coresight_timeout - loop until a bit has changed to a specific register
+ * state
+ * @csa: coresight device access for the device
+ * @offset: Offset of the register from the base of the device.
+ * @position: the position of the bit of interest.
+ * @value: the value the bit should have.
+ *
+ * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
+ * TIMEOUT_US has elapsed, which ever happens first.
+ */
+int coresight_timeout(struct csdev_access *csa, u32 offset,
+ int position, int value)
+{
+ u32 rval = 0;
+
+ return coresight_timeout_retval(csa, offset, position, value, &rval);
}
EXPORT_SYMBOL_GPL(coresight_timeout);

diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index f19a47b9bb5a..6b6b45ef6971 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -500,7 +500,8 @@ extern int coresight_enable(struct coresight_device *csdev);
extern void coresight_disable(struct coresight_device *csdev);
extern int coresight_timeout(struct csdev_access *csa, u32 offset,
int position, int value);
-
+extern int coresight_timeout_retval(struct csdev_access *csa, u32 offset,
+ int position, int value, u32 *rval);
extern int coresight_claim_device(struct coresight_device *csdev);
extern int coresight_claim_device_unlocked(struct coresight_device *csdev);

@@ -536,6 +537,13 @@ static inline int coresight_timeout(struct csdev_access *csa, u32 offset,
return 1;
}

+static inline int coresight_timeout_retval(struct csdev_access *csa, u32 offset,
+ int position, int value, u32 *rval)
+{
+ *rval = 0;
+ return 1;
+}
+
static inline int coresight_claim_device_unlocked(struct coresight_device *csdev)
{
return -EINVAL;
--
2.17.1