Re: [PATCH 1/4] perf/x86/intel: Add Emerald Rapids

[Liang, Kan]

Hi Ingo,

It seems that only the last two patches of the series are merged into
the tip.git perf/urgent branch.

Could you please take the first two patches as well? They similarly add
the CPU model number for perf core driver and perf cstate driver.

Please let me know if you have any questions regarding the first two
patches. If you want me to resend the patches, please let me know as well.

Thanks,
Kan

On 2023-01-06 11:04 a.m., kan.liang@xxxxxxxxxxxxxxx wrote:
> From: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> 
> From core PMU's perspective, Emerald Rapids is the same as the Sapphire
> Rapids. The only difference is the event list, which will be
> supported in the perf tool later.
> 
> Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> ---
>  arch/x86/events/intel/core.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 29d2d0411caf..72943243c95c 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -6487,6 +6487,7 @@ __init int intel_pmu_init(void)
>  		break;
>  
>  	case INTEL_FAM6_SAPPHIRERAPIDS_X:
> +	case INTEL_FAM6_EMERALDRAPIDS_X:
>  		pmem = true;
>  		x86_pmu.late_ack = true;
>  		memcpy(hw_cache_event_ids, spr_hw_cache_event_ids, sizeof(hw_cache_event_ids));