Re: [PATCH 2/4] LoongArch: Add JUMP_LINK_ADDR macro implementation to avoid using la.abs

[Huacai Chen]

But JUMP_LINK_ADDR looks fine to me. :)

Huacai

On Sat, Jan 14, 2023 at 3:25 PM Youling Tang <tangyouling@xxxxxxxxxxx> wrote:
>
> Hi, Jinyang
>
> On 01/14/2023 02:40 PM, Jinyang He wrote:
> >
> > On 2023-01-09 17:07, Youling Tang wrote:
> >> Add JUMP_LINK_ADDR macro implementation to avoid using la.abs.
> >>
> >> Signed-off-by: Youling Tang <tangyouling@xxxxxxxxxxx>
> >> ---
> >>   arch/loongarch/include/asm/stackframe.h |  8 ++++++++
> >>   arch/loongarch/kernel/head.S            | 10 ++++------
> >>   arch/loongarch/power/suspend_asm.S      |  5 ++---
> >>   3 files changed, 14 insertions(+), 9 deletions(-)
> >>
> >> diff --git a/arch/loongarch/include/asm/stackframe.h
> >> b/arch/loongarch/include/asm/stackframe.h
> >> index 96c94035b5d0..f538b3a6d680 100644
> >> --- a/arch/loongarch/include/asm/stackframe.h
> >> +++ b/arch/loongarch/include/asm/stackframe.h
> >> @@ -216,4 +216,12 @@
> >>       RESTORE_SP_AND_RET \docfi
> >>       .endm
> >>   +/* Jump to the virtual address of the link. */
> >> +    .macro JUMP_LINK_ADDR
> >
> > Hi, Youling
> >
> >
> > IMHO the JUMP_CACHE_ADDR is more suitable. And it not clear higt bits,
> > although the result always true currently. Lastly, this macro clobbers
> > t0 and t1, I'd suggest pass them in as args.
>
> Ok, I will modify it as follows：
>
>          .macro JUMP_CACHE_ADDR temp1 temp2
>          li.d    \temp1, CACHE_BASE
>          pcaddi  \temp2, 0
>          or      \temp1, \temp1, \temp2
>          jirl    zero, \temp1, 0xc
>          .endm
>
> There is also an alternative name "JUMP_DMW1_ADDR" for discussion.
>
> Thanks,
> Youling
>
> >
> >
> > Thanks,
> >
> > Jinyang
> >
> >> +    li.d    t0, CACHE_BASE
> >> +    pcaddi    t1, 0
> >> +    or    t0, t0, t1
> >> +    jirl    zero, t0, 0xc
> >> +    .endm
> >> +
> >>   #endif /* _ASM_STACKFRAME_H */
> >> diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S
> >> index aa6181714ec3..e8a4bf9d7599 100644
> >> --- a/arch/loongarch/kernel/head.S
> >> +++ b/arch/loongarch/kernel/head.S
> >> @@ -52,9 +52,8 @@ SYM_CODE_START(kernel_entry)            # kernel
> >> entry point
> >>         /* We might not get launched at the address the kernel is
> >> linked to,
> >>          so we jump there.  */
> >> -    la.abs        t0, 0f
> >> -    jr        t0
> >> -0:
> >> +    JUMP_LINK_ADDR
> >> +
> >>       /* Enable PG */
> >>       li.w        t0, 0xb0        # PLV=0, IE=0, PG=1
> >>       csrwr        t0, LOONGARCH_CSR_CRMD
> >> @@ -106,9 +105,8 @@ SYM_CODE_START(smpboot_entry)
> >>       li.d        t0, CSR_DMW1_INIT    # CA, PLV0
> >>       csrwr        t0, LOONGARCH_CSR_DMWIN1
> >>   -    la.abs        t0, 0f
> >> -    jr        t0
> >> -0:
> >> +    JUMP_LINK_ADDR
> >> +
> >>       /* Enable PG */
> >>       li.w        t0, 0xb0        # PLV=0, IE=0, PG=1
> >>       csrwr        t0, LOONGARCH_CSR_CRMD
> >> diff --git a/arch/loongarch/power/suspend_asm.S
> >> b/arch/loongarch/power/suspend_asm.S
> >> index eb2675642f9f..596a682a7924 100644
> >> --- a/arch/loongarch/power/suspend_asm.S
> >> +++ b/arch/loongarch/power/suspend_asm.S
> >> @@ -78,9 +78,8 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
> >>       li.d        t0, CSR_DMW1_INIT    # CA, PLV0
> >>       csrwr        t0, LOONGARCH_CSR_DMWIN1
> >>   -    la.abs        t0, 0f
> >> -    jr        t0
> >> -0:
> >> +    JUMP_LINK_ADDR
> >> +
> >>       la.pcrel    t0, acpi_saved_sp
> >>       ld.d        sp, t0, 0
> >>       SETUP_WAKEUP
> >
>