[PATCH v4 2/3] arm: dts: nuvoton: npcm: Add sgpio feature

From: Jim Liu
Date: Tue Jan 10 2023 - 03:33:05 EST


Add the SGPIO controller to the NPCM7xx and NPCM8xx devicetree

Signed-off-by: Jim Liu <jim.t90615@xxxxxxxxx>
---
Changes for v4:
- add npcm8xx gpio node
Changes for v3:
- modify node name
- modify in/out property name
Changes for v2:
- modify dts node
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++
.../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 30 +++++++++++++++++++
2 files changed, 60 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index c7b5ef15b716..7f53774a01ec 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -330,6 +330,36 @@
status = "disabled";
};

+ gpio8: gpio@101000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ bus-frequency = <8000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox1_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
+ gpio9: gpio@102000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x102000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ bus-frequency = <8000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox2_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
pwm_fan: pwm-fan-controller@103000 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index aa7aac8c3774..27462894b90a 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
@@ -165,6 +165,36 @@
clocks = <&clk NPCM8XX_CLK_REFCLK>;
syscon = <&gcr>;
};
+
+ gpio8: gpio@101000 {
+ compatible = "nuvoton,npcm845-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM8XX_CLK_APB3>;
+ bus-frequency = <8000000>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox1_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
+ gpio9: gpio@102000 {
+ compatible = "nuvoton,npcm845-sgpio";
+ reg = <0x102000 0x200>;
+ clocks = <&clk NPCM8XX_CLK_APB3>;
+ bus-frequency = <8000000>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&iox2_pins>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
};
};
};
--
2.17.1