Re: [PATCH v2 01/21] dt-bindings: display: tegra: add Tegra20 VIP
From: Luca Ceresoli
Date: Thu Dec 22 2022 - 04:03:59 EST
Hello Dmitry,
On Tue, 20 Dec 2022 23:13:05 +0300
Dmitry Osipenko <digetx@xxxxxxxxx> wrote:
> 02.12.2022 11:11, Luca Ceresoli пишет:
...
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> >>> @@ -0,0 +1,63 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>> +%YAML 1.2
> >>> +---
> >>> +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml#
> >>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>> +
> >>> +title: NVIDIA Tegra VIP (parallel video capture) controller
> >>> +
> >>> +maintainers:
> >>> + - Luca Ceresoli <luca.ceresoli@xxxxxxxxxxx>
> >>> +
> >>> +properties:
> >>> + compatible:
> >>> + enum:
> >>> + - nvidia,tegra20-vip
> >>> +
> >>> + "#address-cells":
> >>> + const: 1
> >>> +
> >>> + "#size-cells":
> >>> + const: 0
> >>> +
> >>> + channel@0:
> >> Kind of odd there is only 1 channel with a unit-address. Are more
> >> channels coming? Please make the binding as complete as possible even if
> >> no driver support yet.
> > This was discussed in v1 with Krzysztof and the outcome was that it's
> > OK because it's likely that other SoCs have more, but the documentation
> > is not public so I cannot add examples.
> >
> > Full discussion (pretty short indeed):
> >
> > https://lore.kernel.org/linux-devicetree/5292cc1b-c951-c5c5-b2ef-c154baf6d7fd@xxxxxxxxxx/
> >
> > Do you agree that the unit-address should be kept?
>
> It's doubtful that there is a SoC having a VIP with multiple channels.
> I'd expect it to be multiple VIPs rather than channels. There are NVIDIA
> people to confirm that.
>
> The "channel" itself looks redundant to me, i.e. the reg and ports
> should be moved to the vip node.
OK, will do in v3 unless there are different opinions.
--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com