Re: [PATCH] pinctrl: rockchip: list all pins in a possible mux route for PX30

[Linus Walleij]

On Tue, Oct 18, 2022 at 2:17 PM Quentin Schulz <foss+kernel@xxxxxxxxx> wrote:

> From: Quentin Schulz <quentin.schulz@xxxxxxxxxxxxxxxxxxxxx>
>
> The mux routes are incomplete for the PX30. This was discovered because
> we had a HW design using cif-clkoutm1 with the correct pinmux in the
> Device Tree but the clock would still not work.
>
> There are actually two muxing required: the pin muxing (performed by the
> usual Device Tree pinctrl nodes) and the "function" muxing (m0 vs m1;
> performed by the mux routing inside the driver). The pin muxing was
> correct but the function muxing was not.
>
> This adds the missing pins and their configuration for the mux routes
> that are already specified in the driver.
>
> Note that there are some "conflicts": it is possible *in Device Tree* to
> (attempt to) mux the pins for e.g. clkoutm1 and clkinm0 at the same time
> but this is actually not possible in hardware (because both share the
> same bit for the function muxing). Since it is an impossible hardware
> design, it is not deemed necessary to prevent the user from attempting
> to "misconfigure" the pins/functions.
>
> Fixes: 87065ca9b8e5 ("pinctrl: rockchip: Add pinctrl support for PX30")
> Signed-off-by: Quentin Schulz <quentin.schulz@xxxxxxxxxxxxxxxxxxxxx>

Patch applied.

Yours,
Linus Walleij