Re: [PATCH v3 0/3] Add support to PHY GMII SEL for J721e CPSW9G QSGMII

[Vinod Koul]

On 26-10-22, 13:15, Siddharth Vadapalli wrote:
> Add compatible for J721e CPSW9G, which contains 8 external ports and 1
> internal host port.
> 
> Update existing approach of using compatible to differentiate between
> devices that support QSGMII mode and those that don't. The new
> approach involves storing the number of qsgmii main ports for the device
> in the num_qsgmii_main_ports member of the "struct phy_gmii_sel_soc_data".
> This approach makes it scalable for newer devices.

Applied, thanks

-- 
~Vinod