On Mon, Oct 31, 2022 at 06:10:49PM +0800, Chester Lin wrote:[...]
Add the DT schema for the DWMAC Ethernet controller on NXP S32 Common
Chassis.
Signed-off-by: Jan Petrous <jan.petrous@xxxxxxx>
Signed-off-by: Chester Lin <clin@xxxxxxxx>
---
.../bindings/net/nxp,s32cc-dwmac.yaml | 145 ++++++++++++++++++
1 file changed, 145 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml
diff --git a/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml
new file mode 100644
index 000000000000..f6b8486f9d42
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/nxp,s32cc-dwmac.yaml
@@ -0,0 +1,145 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2021-2022 NXP
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/net/nxp,s32cc-dwmac.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NXP S32CC DWMAC Ethernet controller
+
+maintainers:
+ - Jan Petrous <jan.petrous@xxxxxxx>
+ - Chester Lin <clin@xxxxxxxx>
+properties:
+ compatible:
+ contains:
Drop 'contains'.
+ enum:
+ - nxp,s32cc-dwmac
[snip]+ clocks:
+ items:
+ - description: Main GMAC clock
+ - description: Peripheral registers clock
+ - description: Transmit SGMII clock
+ - description: Transmit RGMII clock
+ - description: Transmit RMII clock
+ - description: Transmit MII clock
+ - description: Receive SGMII clock
+ - description: Receive RGMII clock
+ - description: Receive RMII clock
+ - description: Receive MII clock
+ - description:
+ PTP reference clock. This clock is used for programming the
+ Timestamp Addend Register. If not passed then the system
+ clock will be used.
If optional, then you need 'minItems'.