Re: [PATCH v4 1/3] dt-bindings: clock: add loongson2 clock include file

From: Huacai Chen
Date: Wed Oct 26 2022 - 08:04:20 EST


Hi, Yinbo,

On Wed, Oct 26, 2022 at 11:03 AM Yinbo Zhu <zhuyinbo@xxxxxxxxxxx> wrote:
>
> This file defines all loongson2 soc clock indexes, it should be
I suggest to use regular names, i.e., don't use loongson2, Loongson2
or LOONGSON2, use Loongson-2 instead. (except in C code). And soc may
be SoC?

Huacai

> included in the device tree in which there's device using the
> clocks.
>
> Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
> MAINTAINERS | 6 ++++
> include/dt-bindings/clock/loongson,ls2k-clk.h | 29 +++++++++++++++++++
> 2 files changed, 35 insertions(+)
> create mode 100644 include/dt-bindings/clock/loongson,ls2k-clk.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 0be0f520c032..b6aae412de9c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -11907,6 +11907,12 @@ S: Maintained
> F: Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml
> F: drivers/thermal/loongson2_thermal.c
>
> +LOONGSON2 SOC SERIES CLOCK DRIVER
> +M: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
> +L: linux-clk@xxxxxxxxxxxxxxx
> +S: Maintained
> +F: include/dt-bindings/clock/loongson,ls2k-clk.h
> +
> LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
> M: Sathya Prakash <sathya.prakash@xxxxxxxxxxxx>
> M: Sreekanth Reddy <sreekanth.reddy@xxxxxxxxxxxx>
> diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h
> new file mode 100644
> index 000000000000..db1e27e792ff
> --- /dev/null
> +++ b/include/dt-bindings/clock/loongson,ls2k-clk.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Author: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
> + * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
> + */
> +
> +#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
> +#define __DT_BINDINGS_CLOCK_LOONGSON2_H
> +
> +#define LOONGSON2_REF_100M 0
> +#define LOONGSON2_NODE_PLL 1
> +#define LOONGSON2_DDR_PLL 2
> +#define LOONGSON2_DC_PLL 3
> +#define LOONGSON2_PIX0_PLL 4
> +#define LOONGSON2_PIX1_PLL 5
> +#define LOONGSON2_NODE_CLK 6
> +#define LOONGSON2_HDA_CLK 7
> +#define LOONGSON2_GPU_CLK 8
> +#define LOONGSON2_DDR_CLK 9
> +#define LOONGSON2_GMAC_CLK 10
> +#define LOONGSON2_DC_CLK 11
> +#define LOONGSON2_APB_CLK 12
> +#define LOONGSON2_USB_CLK 13
> +#define LOONGSON2_SATA_CLK 14
> +#define LOONGSON2_PIX0_CLK 15
> +#define LOONGSON2_PIX1_CLK 16
> +#define LOONGSON2_CLK_END 17
> +
> +#endif
> --
> 2.31.1
>
>