[PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache

[Zong Li]

Since composible cache may be L3 cache if private L2 cache exists, it
should use its original name composible cache to prevent confusion.

Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
Signed-off-by: Zong Li <zong.li@xxxxxxxxxx>
---
 .../riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml}      | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
 rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml} (92%)

diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
similarity index 92%
rename from Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
rename to Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
index 69cdab18d629..1a64a5384e36 100644
--- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
+++ b/Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
@@ -12,8 +12,8 @@ maintainers:
   - Paul Walmsley  <paul.walmsley@xxxxxxxxxx>
 
 description:
-  The SiFive Level 2 Cache Controller is used to provide access to fast copies
-  of memory for masters in a Core Complex. The Level 2 Cache Controller also
+  The SiFive Composable Cache Controller is used to provide access to fast copies
+  of memory for masters in a Core Complex. The Composable Cache Controller also
   acts as directory-based coherency manager.
   All the properties in ePAPR/DeviceTree specification applies for this platform.
 
@@ -27,6 +27,7 @@ select:
         enum:
           - sifive,fu540-c000-ccache
           - sifive,fu740-c000-ccache
+          - sifive,ccache0
 
   required:
     - compatible
@@ -37,6 +38,7 @@ properties:
       - enum:
           - sifive,fu540-c000-ccache
           - sifive,fu740-c000-ccache
+          - sifive,ccache0
       - const: cache
 
   cache-block-size:
-- 
2.17.1