[PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM

[Sai Krishna Potthuri]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx>

Add bindings for Xilinx ZynqMP OCM controller.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx>
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
---
 .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml

diff --git a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
new file mode 100644
index 000000000000..9bcecaccade2
--- /dev/null
+++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Zynqmp OCM EDAC driver
+
+maintainers:
+  - Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx>
+  - Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
+
+description: |
+  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single bit errors
+  that are corrected and double bit ecc errors that are detected by the OCM
+  ECC controller.
+
+properties:
+  compatible:
+    const: xlnx,zynqmp-ocmc-1.0
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    memory-controller@ff960000 {
+      compatible = "xlnx,zynqmp-ocmc-1.0";
+      reg = <0xff960000 0x1000>;
+      interrupts = <0 10 4>;
+    };
-- 
2.17.1