Re: [PATCH 2/2] pinctrl: ocelot: Fix pincfg

[Colin Foster]

Hi Horatiu,

On Thu, Jul 07, 2022 at 08:53:42PM +0200, Horatiu Vultur wrote:
> The blamed commit changed to use regmaps instead of __iomem. But it
> didn't update the register offsets to be at word offset, so it uses byte
> offset.
> 
> Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@xxxxxxxxxxxxx>

Sorry about this one. It sounded familiar though:
https://patchwork.ozlabs.org/project/linux-gpio/patch/20220125161245.418882-1-horatiu.vultur@xxxxxxxxxxxxx/

The only takeaway from that was the use of regmap_get_reg_stride, which
was done in
commit baf927a833ca ("microchip-sgpio: Fix support for regmap")

And I see it is only for pincfg - which I don't have any hardware to
test that. Apologies again!

> ---
>  drivers/pinctrl/pinctrl-ocelot.c | 28 +++++++++++++++-------------
>  1 file changed, 15 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
> index 6212abe2b66f..e84f2f82901f 100644
> --- a/drivers/pinctrl/pinctrl-ocelot.c
> +++ b/drivers/pinctrl/pinctrl-ocelot.c
> @@ -303,6 +303,13 @@ static const char *const ocelot_function_names[] = {
>  	[FUNC_RCVRD_CLK]	= "rcvrd_clk",
>  };
>  
> +const struct regmap_config regmap_pincfg = {
> +		.reg_bits = 32,
> +		.val_bits = 32,
> +		.reg_stride = 4,
> +		.name = "pincfg",
> +};
> +
>  struct ocelot_pmx_func {
>  	const char **groups;
>  	unsigned int ngroups;
> @@ -1334,7 +1341,8 @@ static int ocelot_hw_get_value(struct ocelot_pinctrl *info,
>  	if (info->pincfg) {
>  		u32 regcfg;
>  
> -		ret = regmap_read(info->pincfg, pin, &regcfg);
> +		ret = regmap_read(info->pincfg, pin * regmap_pincfg.reg_stride,
> +				  &regcfg);
>  		if (ret)
>  			return ret;
>  
> @@ -1368,14 +1376,16 @@ static int ocelot_pincfg_clrsetbits(struct ocelot_pinctrl *info, u32 regaddr,
>  	u32 val;
>  	int ret;
>  
> -	ret = regmap_read(info->pincfg, regaddr, &val);
> +	ret = regmap_read(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> +			  &val);
>  	if (ret)
>  		return ret;
>  
>  	val &= ~clrbits;
>  	val |= setbits;
>  
> -	ret = regmap_write(info->pincfg, regaddr, val);
> +	ret = regmap_write(info->pincfg, regaddr * regmap_pincfg.reg_stride,
> +			   val);
>  
>  	return ret;
>  }
> @@ -1940,21 +1950,13 @@ static struct regmap *ocelot_pinctrl_create_pincfg(struct platform_device *pdev)
>  {
>  	void __iomem *base;
>  
> -	const struct regmap_config regmap_config = {
> -		.reg_bits = 32,
> -		.val_bits = 32,
> -		.reg_stride = 4,
> -		.max_register = 32,
> -		.name = "pincfg",
> -	};
> -
> -	base = devm_platform_ioremap_resource(pdev, 1);
> +		base = devm_platform_ioremap_resource(pdev, 1);
>  	if (IS_ERR(base)) {
>  		dev_dbg(&pdev->dev, "Failed to ioremap config registers (no extended pinconf)\n");
>  		return NULL;
>  	}
>  
> -	return devm_regmap_init_mmio(&pdev->dev, base, &regmap_config);
> +	return devm_regmap_init_mmio(&pdev->dev, base, &regmap_pincfg);
>  }
>  
>  static int ocelot_pinctrl_probe(struct platform_device *pdev)
> -- 
> 2.33.0
>