Re: [PATCH v2] LoongArch: Clean useless vcsr in loongarch_fpu.

From: Qi Hu
Date: Wed Jul 06 2022 - 21:29:48 EST



On 2022/7/7 04:49, Jiaxun Yang wrote:

在2022年7月6日七月 上午5:00,Qi Hu写道:
On 2022/7/6 10:51, Xi Ruoyao wrote:
On Wed, 2022-07-06 at 10:35 +0800, Huacai Chen wrote:

Maybe Xuerui and Ruoyao have some misunderstanding. LSX/LASX will
surely be upstream, this has nothing to do with cleanup VCSR16.
Because FP/LSX/LASX share the same control bits in FCSR now.
My guess:

Almost all behavior of vector unit is controlled by FCSR (for example,
the rounding of both FPU and vector unit should be controlled by FCSR
altogether), except one bit similar to the bit 24 of MSACSR ("flush to
zero") is in VCSR [^1]. And "flush to zero" is not really useful so it
will be removed in 3A6000, and we'll not use it for 3A5000.
Actually, flush to zero has been removed in 3A5000.
[^1]: A more bold guess: the hardware engineers could have just said
"let's wire this register called MSACSR in GS464V as FCSR16/VCSR in
LA464, maybe it will be useful and who knows?" But now in practice it's
not useful.

Am I correct?
The hardware(LA464) has removed the vcsr("has but not use" is
incorrect), and here are some details:

- For all FP operations, including LSX/LASX, they are controlled by
fcsr0/1/2/3.

- For LSX/LASX other operations, they are *not* controlled by any other
CSR now. And fcsr16 to fcsr31 are reserved to control these operations
(now they are *undefined*).
Sorry but what do you meant by “these” here?
"These operations" means "LSX/LASX other operations", except its floating-point operations.
If it means LSX/LASX, are you trying to say that future chip’s LSX/LASX won’t be
compatible with present 3A5000? As your said fcsr16 and fcsr31 are undefined
for now.

Thanks
-

"not compatible" is incorrect. If future chips add new features to define and use these registers, some bits in CPUCFG should be set, like CPUID in X86.

And at that time, if the applications do not use these new features(like some old apps), they can run at *default* state which is the same as current 3A5000.

So, "reserved" is just to prepare for adding something, not "incompatible".

Thanks.

- Flush to zero(MSACSR.FS) is removed and not supported.

- If you use "movfcsr2gr" to read the fcsr16, the value is *UNDEFINED*.