Re: [PATCH v1 1/9] dt-bindings: phy: lantiq: xway-rcu-usb2-phy: Convert to YAML

From: Rob Herring
Date: Fri Jul 01 2022 - 12:25:28 EST


On Tue, Jun 28, 2022 at 02:44:33PM +0200, Martin Blumenstingl wrote:
> Convert the Lantiq XWAY RCU USB2 PHY bindings to YAML.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> ---
> .../phy/lantiq,xway-rcu-usb2-phy.yaml | 68 +++++++++++++++++++
> .../bindings/phy/phy-lantiq-rcu-usb2.txt | 40 -----------
> 2 files changed, 68 insertions(+), 40 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
> delete mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
> new file mode 100644
> index 000000000000..702a8e8c64b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/lantiq,xway-rcu-usb2-phy.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/lantiq,xway-rcu-usb2-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
> +
> +maintainers:
> + - Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> +
> +properties:
> + "#phy-cells":
> + const: 0
> +
> + compatible:
> + enum:
> + - lantiq,ase-usb2-phy
> + - lantiq,danube-usb2-phy
> + - lantiq,xrx100-usb2-phy
> + - lantiq,xrx200-usb2-phy
> + - lantiq,xrx300-usb2-phy
> +
> + reg:
> + minItems: 2

Need to define what each entry is which you lost.

> +
> + clocks:
> + minItems: 1
> +
> + clock-names:
> + items:
> + - const: phy
> +
> + resets:
> + minItems: 1

But reset-names requires 2 entries.

> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: phy

'phy' was optional before. You may want to add another case with oneOf:

items:
- const: ctrl

I'm not sure on all the possibilities though. Is 'ctrl' optional?

> + - const: ctrl
> +
> +required:
> + - "#phy-cells"
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + usb_phy0: usb2-phy@18 {
> + compatible = "lantiq,xrx200-usb2-phy";
> + reg = <0x18 4>, <0x38 4>;
> +
> + clocks = <&pmu_USB0_PHY>;
> + clock-names = "phy";
> +
> + resets = <&reset1 4 4>, <&reset0 4 4>;
> + reset-names = "phy", "ctrl";
> +
> + #phy-cells = <0>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt b/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
> deleted file mode 100644
> index 643948b6b576..000000000000
> --- a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
> -===========================================
> -
> -This binding describes the USB PHY hardware provided by the RCU module on the
> -Lantiq XWAY SoCs.
> -
> -This node has to be a sub node of the Lantiq RCU block.
> -
> --------------------------------------------------------------------------------
> -Required properties (controller (parent) node):
> -- compatible : Should be one of
> - "lantiq,ase-usb2-phy"
> - "lantiq,danube-usb2-phy"
> - "lantiq,xrx100-usb2-phy"
> - "lantiq,xrx200-usb2-phy"
> - "lantiq,xrx300-usb2-phy"
> -- reg : Defines the following sets of registers in the parent
> - syscon device
> - - Offset of the USB PHY configuration register
> - - Offset of the USB Analog configuration
> - register (only for xrx200 and xrx200)
> -- clocks : References to the (PMU) "phy" clk gate.
> -- clock-names : Must be "phy"
> -- resets : References to the RCU USB configuration reset bits.
> -- reset-names : Must be one of the following:
> - "phy" (optional)
> - "ctrl" (shared)
> -
> --------------------------------------------------------------------------------
> -Example for the USB PHYs on an xRX200 SoC:
> - usb_phy0: usb2-phy@18 {
> - compatible = "lantiq,xrx200-usb2-phy";
> - reg = <0x18 4>, <0x38 4>;
> -
> - clocks = <&pmu PMU_GATE_USB0_PHY>;
> - clock-names = "phy";
> - resets = <&reset1 4 4>, <&reset0 4 4>;
> - reset-names = "phy", "ctrl";
> - #phy-cells = <0>;
> - };
> --
> 2.36.1
>
>