[irqchip: irq/irqchip-next] irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling

[irqchip-bot for Samuel Holland]

The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     5873ba559101fa37ad9764e79856f71bf54021aa
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/5873ba559101fa37ad9764e79856f71bf54021aa
Author:        Samuel Holland <samuel@xxxxxxxxxxxx>
AuthorDate:    Thu, 30 Jun 2022 05:02:41 -05:00
Committer:     Marc Zyngier <maz@xxxxxxxxxx>
CommitterDate: Fri, 01 Jul 2022 15:27:23 +01:00

irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling

The T-HEAD PLIC ignores additional edges seen while an edge-triggered
interrupt is being handled. Because of this behavior, the driver needs
to complete edge-triggered interrupts in the .irq_ack callback before
handling them, instead of in the .irq_eoi callback afterward. Otherwise,
it could miss some interrupts.

Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>
Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20220630100241.35233-5-samuel@xxxxxxxxxxxx
---
 drivers/irqchip/irq-sifive-plic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 90e4436..b3a36dc 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -474,7 +474,6 @@ static int __init plic_init(struct device_node *node,
 
 IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
 IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
-IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */
 
 static int __init plic_edge_init(struct device_node *node,
 				 struct device_node *parent)
@@ -483,3 +482,4 @@ static int __init plic_edge_init(struct device_node *node,
 }
 
 IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init);
+IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init);