Re: [PATCH] perf mem: Trace physical address for Arm SPE events

From: Namhyung Kim
Date: Tue May 31 2022 - 18:26:13 EST


Hi Leo,

On Mon, May 30, 2022 at 1:37 AM Leo Yan <leo.yan@xxxxxxxxxx> wrote:
>
> Currently, Arm SPE events don't trace physical address, therefore, the
> field 'phys_addr' is always zero in synthesized memory samples. This
> leads to perf c2c tool cannot locate the memory node for samples.
>
> This patch enables configuration 'pa_enable' for Arm SPE events, so the
> physical address packet can be traced, finally this can allow perf c2c
> tool to locate properly for memory node.
>
> Signed-off-by: Leo Yan <leo.yan@xxxxxxxxxx>

Acked-by: Namhyung Kim <namhyung@xxxxxxxxxx>


> ---
> tools/perf/arch/arm64/util/mem-events.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm64/util/mem-events.c
> index be41721b9aa1..df817d1f9f3e 100644
> --- a/tools/perf/arch/arm64/util/mem-events.c
> +++ b/tools/perf/arch/arm64/util/mem-events.c
> @@ -5,9 +5,9 @@
> #define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
>
> static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
> - E("spe-load", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
> - E("spe-store", "arm_spe_0/ts_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
> - E("spe-ldst", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
> + E("spe-load", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
> + E("spe-store", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
> + E("spe-ldst", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),

Unrelated, but is there "arm_spe_1" or others?

Thanks,
Namhyung


> };
>
> static char mem_ev_name[100];
> --
> 2.25.1
>