Re: [PATCH v5 06/10] i2c: npcm: Correct register access width

[Wolfram Sang]

On Tue, May 17, 2022 at 06:11:38PM +0800, Tyrone Ting wrote:
> From: Tyrone Ting <kfting@xxxxxxxxxxx>
> 
> The SMBnCTL3 register is 8-bit wide and the 32-bit access was always
> incorrect, but simply didn't cause a visible error on the 32-bit machine.
> 
> On the 64-bit machine, the kernel message reports that ESR value is
> 0x96000021. Checking Arm Architecture Reference Manual Armv8 suggests that
> it's the alignment fault.
> 
> SMBnCTL3's address is 0xE.
> 
> Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
> Signed-off-by: Tyrone Ting <kfting@xxxxxxxxxxx>
> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@xxxxxxx>

Applied to for-next, thanks!

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