Re: [PATCH 1/2] dt-bindings: Renesas versaclock7 device tree bindings

[Rob Herring]

On Tue, 03 May 2022 12:42:00 -0700, Alex Helms wrote:
> Renesas Versaclock7 is a family of configurable clock generator ICs
> with fractional and integer dividers. This driver has basic support
> for the RC21008A device, a clock synthesizer with a crystal input and
> 8 outputs. The supports changing the FOD and IOD rates, and each
> output can be gated.
> 
> Signed-off-by: Alex Helms <alexander.helms.jy@xxxxxxxxxxx>
> ---
>  .../bindings/clock/renesas,versaclock7.yaml   | 64 +++++++++++++++++++
>  MAINTAINERS                                   |  5 ++
>  2 files changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml
> 

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>