[PATCH v8 1/3] ARM: dts: nuvoton: Add memory controller node

From: Medad CChien
Date: Tue May 03 2022 - 05:47:57 EST


ECC must be configured in the BootBlock header.
Then, you can read error counts via
the EDAC kernel framework.

Signed-off-by: Medad CChien <ctcchien@xxxxxxxxxxx>
Reviewed-by: Borislav Petkov <bp@xxxxxxxxx>
Reviewed-by: Paul Menzel <pmenzel@xxxxxxxxxxxxx>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 3696980a3da1..ba542b26941e 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -106,6 +106,13 @@
interrupt-parent = <&gic>;
ranges;

+ mc: memory-controller@f0824000 {
+ compatible = "nuvoton,npcm750-memory-controller";
+ reg = <0x0 0xf0824000 0x0 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
rstc: rstc@f0801000 {
compatible = "nuvoton,npcm750-reset";
reg = <0xf0801000 0x70>;
--
2.17.1