Re: [Patch v6 3/4] dt-bindings: memory: Update reg maxitems for tegra186

From: Ashish Mhetre
Date: Mon Apr 11 2022 - 11:03:00 EST




On 4/10/2022 7:51 PM, Dmitry Osipenko wrote:
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06.04.2022 08:24, Ashish Mhetre пишет:
memory-controller@2c00000 {
compatible = "nvidia,tegra186-mc";
- reg = <0x0 0x02c00000 0x0 0xb0000>;
+ reg = <0x0 0x02c00000 0x0 0x10000>, /* MC-SID */
+ <0x0 0x02c10000 0x0 0x10000>, /* Broadcast channel */
+ <0x0 0x02c20000 0x0 0x10000>, /* MC0 */
+ <0x0 0x02c30000 0x0 0x10000>, /* MC1 */
+ <0x0 0x02c40000 0x0 0x10000>, /* MC2 */
+ <0x0 0x02c50000 0x0 0x10000>; /* MC3 */
+ reg-names = "mc-sid", "mc-broadcast", "mc0", "mc1", "mc2", "mc3";

The "mc-" prefix feels redundant to me, I'd name the regs like this:

"sid", "broadcast", "ch0", "ch1", "ch2", "ch3"


You should also add validation of the regs/reg-names to the yaml based
on SoC version. I.e. it's not enough to only bump the maxItems.

Okay, I will add validation of reg-names as following:

reg-names:
minItems: 0
maxItems: 6
items:
- const: sid
- const: broadcast
- const: ch0
- const: ch1
- const: ch2
- const: ch3


We will have to keep minItems to 0 in order to make it compatible with
old DT, right?