Re: [PATCH] imx8mm-venice-gw7902: update pci refclk

From: Shawn Guo
Date: Sun Apr 10 2022 - 21:31:22 EST


On Tue, Apr 05, 2022 at 01:06:25PM -0700, Tim Harvey wrote:
> Use the correct PCI clock bindings.

Please improve the commit log to explain why clock "pcie_phy" can be
dropped.

Shawn

>
> Signed-off-by: Tim Harvey <tharvey@xxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> index 6aa0eb463647..f71416be29a7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
> @@ -595,7 +595,7 @@
> &pcie_phy {
> fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> fsl,clkreq-unsupported;
> - clocks = <&clk IMX8MM_CLK_DUMMY>;
> + clocks = <&pcie0_refclk>;
> status = "okay";
> };
>
> @@ -604,8 +604,8 @@
> pinctrl-0 = <&pinctrl_pcie0>;
> reset-gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
> clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
> - <&clk IMX8MM_CLK_DUMMY>, <&pcie0_refclk>;
> - clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> + <&pcie0_refclk>;
> + clock-names = "pcie", "pcie_aux", "pcie_bus";
> assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> <&clk IMX8MM_CLK_PCIE1_CTRL>;
> assigned-clock-rates = <10000000>, <250000000>;
> --
> 2.17.1
>