[PATCH] dt-bindings: watchdog: fsl-imx7ulp-wdt: Fix assigned-clock-parents

From: Rob Herring
Date: Thu Jan 20 2022 - 12:23:47 EST


The schema has a typo with 'assigned-clocks-parents'. As it is not
required to list assigned clocks in bindings, just drop the assigned-clocks
property definitions to fix this.

Signed-off-by: Rob Herring <robh@xxxxxxxxxx>
---
.../devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
index fb603a20e396..4ca8a31359a5 100644
--- a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
@@ -29,12 +29,6 @@ properties:
clocks:
maxItems: 1

- assigned-clocks:
- maxItems: 1
-
- assigned-clocks-parents:
- maxItems: 1
-
timeout-sec: true

required:
@@ -56,7 +50,7 @@ examples:
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
- assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
+ assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
timeout-sec = <40>;
};

--
2.32.0