Re: [PATCH v5 1/5] x86: clk: clk-fch: Add support for newer family of AMD's SOC

[Stephen Boyd]

Quoting Ajit Kumar Pandey (2021-12-12 10:05:23)
> FCH controller clock configuration slightly differs across AMD's
> SOC architectures. Newer family of SOC only support a 48MHz fix
> clock while stoney SOC family has a clk_mux to choose 48MHz and
> 25 MHz clk. At present fixed clk support is only enabled for RV
> architecture using "is-rv" device property initialized from boot
> loader. This limit 48MHz fixed clock gate support to RV platform
> unless we add similar device property in boot loader for other
> architectures.
> 
> Add pci_device_id table with Stoney platform id and replace "is-rv"
> device property check with pci id match to add clk mux support with
> 25MHz and 48MHz clk support based on clk mux selection. This enable
> 48Mhz fixed fch clock support by default on all newer SOC's except
> stoney. Also replace RV with FIXED as a generic naming conventions
> across all platforms and changed module description.
> 
> Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@xxxxxxx>
> Reviewed-by: Mario Limonciello <Mario.Limonciello@xxxxxxx>
> ---

Applied to clk-next