Re: [PATCH v2 5/6] KVM: x86: Update vPMCs when retiring instructions

[Like Xu]

On 9/12/2021 12:33 pm, Jim Mattson wrote:
> On Mon, Nov 29, 2021 at 11:42 PM Like Xu <like.xu.linux@xxxxxxxxx> wrote:
> > From: Like Xu <likexu@xxxxxxxxxxx>
> >
> > When KVM retires a guest instruction through emulation, increment any
> > vPMCs that are configured to monitor "instructions retired," and
> > update the sample period of those counters so that they will overflow
> > at the right time.
> >
> > Signed-off-by: Eric Hankland <ehankland@xxxxxxxxxx>
> > [jmattson:
> >    - Split the code to increment "branch instructions retired" into a
> >      separate commit.
> >    - Added 'static' to kvm_pmu_incr_counter() definition.
> >    - Modified kvm_pmu_incr_counter() to check pmc->perf_event->state ==
> >      PERF_EVENT_STATE_ACTIVE.
> > ]
> > Fixes: f5132b01386b ("KVM: Expose a version 2 architectural PMU to a guests")
> > Signed-off-by: Jim Mattson <jmattson@xxxxxxxxxx>
> > [likexu:
> >    - Drop checks for pmc->perf_event or event state or event type
> >    - Increase a counter once its umask bits and the first 8 select bits are matched
> >    - Rewrite kvm_pmu_incr_counter() with a less invasive approach to the host perf;
> >    - Rename kvm_pmu_record_event to kvm_pmu_trigger_event;
> >    - Add counter enable and CPL check for kvm_pmu_trigger_event();
> > ]
> > Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
> > Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>
> > ---
>
> > +void kvm_pmu_trigger_event(struct kvm_vcpu *vcpu, u64 perf_hw_id)
> > +{
> > +       struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> > +       struct kvm_pmc *pmc;
> > +       int i;
> > +
> > +       for_each_set_bit(i, pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX) {
> > +               pmc = kvm_x86_ops.pmu_ops->pmc_idx_to_pmc(pmu, i);
> > +
> > +               if (!pmc || !pmc_is_enabled(pmc) || !pmc_speculative_in_use(pmc))
> > +                       continue;
> > +
> > +               /* Ignore checks for edge detect, pin control, invert and CMASK bits */
>
> I don't understand how we can ignore these checks. Doesn't that
> violate the architectural specification?

OK, let's take a conservative approach in the V3.

> > +               if (eventsel_match_perf_hw_id(pmc, perf_hw_id) && cpl_is_matched(pmc))
> > +                       kvm_pmu_incr_counter(pmc);
> > +       }
> > +}
> > +EXPORT_SYMBOL_GPL(kvm_pmu_trigger_event);
> > +