[RFC PATCH 06/10] x86/fpu/xcr: Return all enabled xfeature if CPU doesn't support

[Jiaxun Yang]

Read from XCR0 when CPU doesn't support X86_FEATURE_XGETBV1.
It just assumes that all enabled features are in use.

Signed-off-by: Jiaxun Yang <j.yang-87@xxxxxxxxxxxx>
---
 arch/x86/include/asm/fpu/xcr.h | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/fpu/xcr.h b/arch/x86/include/asm/fpu/xcr.h
index 9656a5bc6fea..e718074ef141 100644
--- a/arch/x86/include/asm/fpu/xcr.h
+++ b/arch/x86/include/asm/fpu/xcr.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_X86_FPU_XCR_H
 #define _ASM_X86_FPU_XCR_H
 
+#include <asm/alternative.h>
+
 #define XCR_XFEATURE_ENABLED_MASK	0x00000000
 #define XCR_XFEATURE_IN_USE_MASK	0x00000001
 
@@ -25,11 +27,21 @@ static inline void xsetbv(u32 index, u64 value)
  * Return a mask of xfeatures which are currently being tracked
  * by the processor as being in the initial configuration.
  *
- * Callers should check X86_FEATURE_XGETBV1.
+ * It will return XCR0, which is all enabled xfeatures in case
+ * CPU doesn't support X86_FEATURE_XGETBV1.
  */
 static inline u64 xfeatures_in_use(void)
 {
-	return xgetbv(XCR_XFEATURE_IN_USE_MASK);
+	u32 eax, edx;
+
+	asm volatile(ALTERNATIVE(
+			"mov  $0, %%ecx",
+			"mov  $1, %%ecx",
+			X86_FEATURE_XGETBV1)
+			"xgetbv"
+			: "=a" (eax), "=d" (edx) :: "ecx");
+
+	return eax + ((u64)edx << 32);
 }
 
 #endif /* _ASM_X86_FPU_XCR_H */
-- 
2.30.2