[PATCH v3 10/17] clocksource/arm_arch_timer: Remove any trace of the TVAL programming interface
From: Marc Zyngier
Date: Sun Oct 10 2021 - 07:57:13 EST
TVAL usage is now long gone, get rid of the leftovers.
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
---
drivers/clocksource/arm_arch_timer.c | 8 --------
include/clocksource/arm_arch_timer.h | 1 -
2 files changed, 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index ef3f83865dcd..6e20bc12dc35 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -48,10 +48,8 @@
#define CNTPCT_LO 0x08
#define CNTFRQ 0x10
#define CNTP_CVAL_LO 0x20
-#define CNTP_TVAL 0x28
#define CNTP_CTL 0x2c
#define CNTV_CVAL_LO 0x30
-#define CNTV_TVAL 0x38
#define CNTV_CTL 0x3c
static unsigned arch_timers_present __initdata;
@@ -111,9 +109,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
case ARCH_TIMER_REG_CTRL:
writel_relaxed((u32)val, timer->base + CNTP_CTL);
break;
- case ARCH_TIMER_REG_TVAL:
- writel_relaxed((u32)val, timer->base + CNTP_TVAL);
- break;
case ARCH_TIMER_REG_CVAL:
/*
* Not guaranteed to be atomic, so the timer
@@ -130,9 +125,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
case ARCH_TIMER_REG_CTRL:
writel_relaxed((u32)val, timer->base + CNTV_CTL);
break;
- case ARCH_TIMER_REG_TVAL:
- writel_relaxed((u32)val, timer->base + CNTV_TVAL);
- break;
case ARCH_TIMER_REG_CVAL:
/* Same restriction as above */
writeq_relaxed(val, timer->base + CNTV_CVAL_LO);
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index d59537afb29d..e715bdb720d5 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -24,7 +24,6 @@
enum arch_timer_reg {
ARCH_TIMER_REG_CTRL,
- ARCH_TIMER_REG_TVAL,
ARCH_TIMER_REG_CVAL,
};
--
2.30.2