Re: [PATCH v8 06/11] x86/traps: Add #VE support for TDX guest

[Lai Jiangshan]

On Tue, Oct 5, 2021 at 10:54 AM Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx> wrote:

>
> The entry paths do not access TD-shared memory, MMIO regions or use
> those specific MSRs, instructions, CPUID leaves that might generate #VE.
> In addition, all interrupts including NMIs are blocked by the hardware
> starting with #VE delivery until TDGETVEINFO is called.  This eliminates
> the chance of a #VE during the syscall gap or paranoid entry paths and
> simplifies #VE handling.

Hello

If the reason is applied to #VE, I think it can be applied to SVM-ES's
#VC too.  (I wish the entry code for #VC to be simplified since I'm
moving some the asm entry code to C code)


And I'm sorry I haven't read all the emails.
Has the question asked by Andy Lutomirski been answered in any emails?

https://lore.kernel.org/lkml/CALCETrU9XypKbj-TrXLB3CPW6=MZ__5ifLz0ckbB=c=Myegn9Q@xxxxxxxxxxxxxx/

Thanks
Lai

>
> After TDGETVEINFO #VE could happen in theory (e.g. through an NMI),
> but it is expected not to happen because TDX expects NMIs not to
> trigger #VEs. Another case where they could happen is if the #VE
> exception panics, but in this case there are no guarantees on anything
> anyways.
>