Re: [PATCH v3 2/2] xen-pciback: allow compiling on other archs than x86

[Oleksandr Andrushchenko]

On 24.09.21 08:46, Oleksandr Andrushchenko wrote:
> On 23.09.21 23:00, Stefano Stabellini wrote:
>> On Thu, 23 Sep 2021, Oleksandr Andrushchenko wrote:
>>> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>
>>>
>>> Xen-pciback driver was designed to be built for x86 only. But it
>>> can also be used by other architectures, e.g. Arm.
>>> Re-structure the driver in a way that it can be built for other
>>> platforms as well.
>>>
>>> Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@xxxxxxxx>
>>> Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@xxxxxxxx>
>> The patch looks good to me. Only one thing: on ARM32 I get:
> WE do not yet support Xen PCI passthrough for ARM32
>> drivers/xen/xen-pciback/conf_space_header.c: In function ‘bar_init’:
>> drivers/xen/xen-pciback/conf_space_header.c:239:34: warning: right shift count >= width of type [-Wshift-count-overflow]
>>       bar->val = res[pos - 1].start >> 32;
>>                                     ^~
>> drivers/xen/xen-pciback/conf_space_header.c:240:49: warning: right shift count >= width of type [-Wshift-count-overflow]
>>       bar->len_val = -resource_size(&res[pos - 1]) >> 32;
>>    
>>    
>> resource_size_t is defined as phys_addr_t and it can be 32bit on arm32.
>>
>>
>> One fix is to surround:
>>
>> 		if (pos && (res[pos - 1].flags & IORESOURCE_MEM_64)) {
>> 			bar->val = res[pos - 1].start >> 32;
>> 			bar->len_val = -resource_size(&res[pos - 1]) >> 32;
>> 			return bar;
>> 		}
>>
>> with #ifdef PHYS_ADDR_T_64BIT
>>
> This might not be correct. We are dealing here with a 64-bit BAR on a 32-bit OS.
>
> I think that this can still be valid use-case if BAR64.hi == 0. So, not sure
>
> we can just skip it with ifdef.
>
> Instead, to be on the safe side, we can have:
>
> config XEN_PCIDEV_STUB
>          tristate "Xen PCI-device stub driver"
>          depends on PCI && ARM64 && XEN
> e.g. only allow building the "stub" for ARM64 for now.

Or... there are couple of places in the kernel where PCI deals with the 32 bit shift as:

drivers/pci/setup-res.c:108:        new = region.start >> 16 >> 16;
drivers/pci/iov.c:949:        new = region.start >> 16 >> 16;

commit cf7bee5a0bf270a4eace0be39329d6ac0136cc47
Date:   Sun Aug 7 13:49:59 *2005* +0400

[snip]

     Also make sure to write high bits - use "x >> 16 >> 16" (rather than the
     simpler ">> 32") to avoid warnings on 32-bit architectures where we're
     not going to have any high bits.

This might not be(?) immediately correct in case of LPAE though, e.g.

64-bit BAR may tolerate 40-bit address in some use-cases?