Re: [v3 06/24] clk: mediatek: Add MT8195 apmixedsys clock support
From: Stephen Boyd
Date: Tue Sep 14 2021 - 18:18:24 EST
Quoting Chun-Jie Chen (2021-09-13 19:16:15)
> Add MT8195 apmixedsys clock controller which provides Plls
> generated from SoC 26m and ssusb clock gate control.
>
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx>
> Reviewed-by: Chen-Yu Tsai <wenst@xxxxxxxxxxxx>
> ---
Applied to clk-next