Re: [PATCH v2] arm64: dts: qcom: sc7280: Add Display Port node

From: Bjorn Andersson
Date: Mon Aug 30 2021 - 22:28:59 EST


On Mon 30 Aug 11:04 CDT 2021, Kuogee Hsieh wrote:

> Changes in v2:
> -- break this patch into 3 patches
>

It's only the DRM tree that want the changelog above '---', please move
it down.

Also, why isn't this "patch n/3" if there's three patches?

> Signed-off-by: Kuogee Hsieh <khsieh@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 88 +++++++++++++++++++++++++++++++++++-
> 1 file changed, 87 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c29226b..f224029 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -3202,6 +3202,13 @@
> remote-endpoint = <&edp_in>;
> };
> };
> +
> + port@2 {
> + reg = <2>;
> + dpu_intf0_out: endpoint {
> + remote-endpoint = <&dp_in>;
> + };
> + };

This block seems to be indented with spaces?

> };
>
> mdp_opp_table: mdp-opp-table {
> @@ -3389,6 +3396,78 @@
> };
> };
> };
> +
> + msm_dp: displayport-controller@ae90000 {

Prefixing the labels of all the mdss children mdss_ instead has the
benefit that the nodes group naturally in the board dts.

> + status = "disabled";
> + compatible = "qcom,sc7180-dp", "qcom,sc7280-dp";

This isn't a sc7180-dp block.

> +
> + reg = <0 0x0ae90000 0 0x1400>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + clock-names = "core_iface",
> + "core_aux",
> + "ctrl_link",
> + "ctrl_link_iface",

There seems to be some spaced among the tabs here.

> + "stream_pixel";
> + #clock-cells = <1>;
> + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> + assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> + phys = <&dp_phy>;
> + phy-names = "dp";
> +
> + operating-points-v2 = <&dp_opp_table>;
> + power-domains = <&rpmhpd SC7280_CX>;
> +
> + #sound-dai-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + dp_in: endpoint {
> + remote-endpoint = <&dpu_intf0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_out: endpoint { };
> + };
> + };
> +
> + dp_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-160000000 {
> + opp-hz = /bits/ 64 <160000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-270000000 {
> + opp-hz = /bits/ 64 <270000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-540000000 {
> + opp-hz = /bits/ 64 <540000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-810000000 {
> + opp-hz = /bits/ 64 <810000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + };
> + };
> + };
> };
>
> dispcc: clock-controller@af00000 {
> @@ -3398,7 +3477,8 @@
> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> <&dsi_phy 0>,
> <&dsi_phy 1>,
> - <0>, <0>,
> + <&dp_phy 0>,
> + <&dp_phy 1>,

Same here, seems to be some spaces among the tabs on both of these
lines.

> <&msm_edp 0>,
> <&msm_edp 1>;
> clock-names = "bi_tcxo", "gcc_disp_gpll0_clk",
> @@ -3525,6 +3605,12 @@
> };
> };
>
> + dp_hot_plug_det: dp-hot-plug-det {
> + pins = "gpio47";
> + function = "dp_hot";
> + bias-disable;
> + };

This seems to be indented with spaces?

Regards,
Bjorn

> +
> qspi_clk: qspi-clk {
> pins = "gpio14";
> function = "qspi_clk";
> --
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